NT Of 00,1 U. S. DEPARTMENT OF COMMERCE Malcolm Baldrige, Secretary National Oceanic and Atmospheric Administration John V Byrne Administrator National Weather Service Richard E. Halgren, Assistant Administrator WITHDRAWN University ot UNIVERSITY OF ' Illinois l!br*r Illinois library at Urhana Charr^a- AT URBANA-CHAMPAlGN BQQKSTACKS INSTRUCTION MANUAL HYGROTHERMOMETER (H083) Volume 2 Troubleshooting/Repair Volume ENGINEERING DIVISION INSTRUCTION MANUAL 8-406 fiEEQSlIORtf APR 1 61985 university of ilunois ENGINEERING DIVISION at urbana-champaign Silver Spring, Md.\X)C C 5S . 108 OcWA/r^Xj) WARNING Operating and maintenence personnel must at all times observe safety regulations. Do not change plug-in components with equipment energized. Under certain conditions, dangerous voltages may exist in circuitry with power controls in the off position because of charges retained by capacitors. Maintenence personnel should familiarize themselves with the techniques for resuscitation found in most first aid manuals. CAUTION This equipment contains semiconductor devices and integrated circuits. To avoid damaging them, follow the instructions in Section 4 of the Support Volume, Maintenance Procedures, for all adjustments and maintenance procedures.THE LIST OF EFFECTIVE PAGES IS A COMPLETE LIST OF ALL MANUAL PAGES. WHEN PAGES ARE CHANGED, ADDED OR DELETED, THE LIST WILL BE UPDATED. SUPERSEDED PAGES SHOULD BE DESTROYED. NOTE CHANGES TO TEXT ARE INDICATED BY VERTICAL LINES IN THE OUTER MARGINS OF THE AFFECTED PAGES. DATES OF ISSUE FOR ORIGINAL AND CHANGED PAGES ARE: ORIGINAL _0 TOTAL NUMBER OF PAGES IN THIS PUBLICATION IS 2 88 CONSISTING OF THE FOLLOWING: SUPPORT VOLUME PAGE NO. CHANGE NO.* Title..................0 1-xi i..................0 1-1 - 1-8..............0 2-1 - 2-6..............0 3-1 - 3-12.............0 4-1 - 4-6..............0 5-1 - 5-8..............0 TROUBLESHOOTING/REPAIR VOLUME PAGE NO. CHANGE NO.* Title..................0 i-xiv..................0 1-1 - 1-40.............0 2-1 - 2-52.............0 3-1 - 3-6..............0 4-1 - 4-18.............0 A-l - A-22.............0 B-l - B-58.............0 C-l - C-24.............0 * ZERO IN THIS COLUMN INDICATES AN ORIGINAL PAGE.EXPLANATION OF CODES & SHADES EXPLANATION OF MDC USAGE FAMILY TREE INTERCONNECTING CABLE DIAGRAM TURN-ON/CHECKOUT CHART INTEGRATED CIRCUIT DATA SOFTWARE LISTING PARTS LIST OVERALL SYSTEM FUNCTION SENSING FUNCTION ANALOG SIG. CONDITIONING FUNCTION DATA TRANSMISSION FUNCTION DATA DISPLAY FUNCTION POWER DISTRIBUTION FUNCTION ASPIRATOR UNIT (UNIT 1) DEW POINT SENSOR ASSEMBLY (lAl) TRANSMITTER UNIT (UNIT 2) TRANSMIT LOGIC ASSEMBLY (2A1) CALIBRATOR ASSEMBLY (2A2) +5 VOLT POWER SUPPLY (2A3) AUXILIARY POWER SUPPLY (2A4) DISPLAY UNIT (UNIT 3) RECEIVE LOGIC ASSEMBLY (3Al) +5 VOLT POWER SUPPLY (3A2) DISPLAY POWER SUPPLY (3A3) NUMERIC DISPLAYS (3A4A1-3A4A4) FRONT MATTER PAGE # v vii xi xiii xv OVERALL FUNCTION DIAGRAM w/KEYED TEXT MAJOR BLOCKED SCHEMATIC SCHEMATIC DIAGRAM DIAGRAM w/KEYED TEXT w/KEYED TEXT WIRING DIAGRAM MAINT. DEPENDENCY CHART (MDC) REPAIR NOTES PARTS LOCATION DIAGRAMS APPENDICES PAGE # PAGE # PAGE # PAGE # PAGE # PAGE # PAGE # PAGE # 1-1 1-7 1-15 1-21 1-27 1-35 2-1 2-5 2-9 2-13 2-21 2-25 2-29 2-33 2-39 2-25 2-45 2-49 3-1 3-3 3-5 1-5 1-13 1-19 1-25 1-33 1-39 4-1 4-1 4-5 4-5 4-5 4-6 4-6 4-11 4-11 4-11 4-12 2-51 4-3 4-3 4-9 4-9 4-9 4-9 4-9 4-15 4-15 4-15 4-15 4-15 A-l B-l C-lCATEGORY DEFINITION B Data bus, multi-line. C Composite circuit (one which has been subfunction- alized); composite functional circuits containing one or more circuits falling into the categories listed below are preceded by the letter C. D Display assembly. I Integrated circuits; circuits containing IC's are preceded by the letter I. M Mechanical item. N Linear networks; circuits containing several linear components (resistors, capacitors, etc.) arranged in a network are preceded by the letter N. Q Transistor circuits; circuits containing transistors are preceded by the letter Q. R Resistive element or potentiometer. U Circuit module. X Semiconductor circuits; circuits containing semi- conductor diodes are preceded by the letter X. CODE DEFINITION CODE DEFINITION AMP Amplifier LOG Logic Assembly BUS Data Bus MUX Multiplexer CAL Calibrator OSC Oscillator CON Converter PG Pulse Generator DEC Decoder PRO Data Processor DET Detector PS Power Supply DIS Display PWR Power Component FAN Fan, Blower RCT Rectifier FF Flip-Flop REG Regulator FL Filter RES Resistive Element ISO Isolation Network SEN Sensor LED Light Emitting Diode SW Switch LIM Limiter, or Limit THM Thermoelectric Detector Heat Pump CATEGORY SPECIAL NORMAL SYMBOLS FAULT DEFINITION SIGNAL CODE SYMBOLS > > MAJOR FUNCTIONAL FLOW >- SECONDARY FUNCTIONAL FLOW m D REFERENCE VOLTAGE FEEDBACK SIGNAL PATH ► SIGNAL PATH TO ENERGIZE RELAY >-> » TEST SIGNAL OR SIGNAL USED TO LIGHT/ LAMP OR PROVIDE METER READING MAJOR SIGNAL FLOW LINE ->- SECONDARY SIGNAL FLOW LINE GROUND AND RETURN SYMBOLS DIRECT CONNECTION TO CHASSIS ± EARTH GROUND w DC RETURN CONNECTIONS V V SEPARATE DC RETURNS IN A PARTICULAR ASSEMBLY w AC NEUTRAL CONNECTIONS SHIELD CONNECTIONS 5 YMBOLS USED FOR ADJUSTMENTS. SWITCHES AND INDICATORS © SCREWDRIVER ADJUSTMENT 0 KNOB ADJUSTMENT • PUSHBUTTON SWITCH TOGGLE SWITCH 0 INDICATOR LAMP SPECIAL SYMBOLS USED ON MAJOR FUNCTION DIAGRAMS K> ID RELAY CONTACTS: RELAY CONTACTS ARE ALWAYS DEPICTED IN SUCH A MANNER THAT, WHEN ENERGIZED, RELAY SWINGING CONTACT CONNECTS TO STATIONARY CONTACT NEAREST TO THE RELAY SOLENOID. RELAY SOLENOID EXAMPLE OF SHADED AREAS AREA CUT BACK TO WHITE INDICATES EXTERNAL CONTROL LIGHT BLUE SHADE INDICATES COMPOSITE FUNCTIONAL GROUP DARKER BLUE SHADE INDICATES SUB-FUNCTIONAL GROUP (?) Q-AMP-2 LIGHTEST GREY SHADE INDICATES MAJOR PHYSICAL UNIT DARKER GREY SHADE INDICATES SUBORDINATE PHYSICAL UNIT AREA CUT BACK TO A GREY SHADE INDICATES LEVEL OF CONTAINMENT OF THE ADJUSTMENT Explanation of Codes and Symbols vThe following are general safety precautions that are not related to any specific procedures and therefore do not appear elsewhere in this manual. These are recommended precautions that personnel must understand and apply during many phases of operation and maintenance. KEEP AWAY FROM LIVE CIRCUITS Operating personnel must at all times observe all safety regulations. Do not replace components with the equipment energized. Under certain conditions, dangerous potentials may exist when the power control is in the off position, due to charges retained by capacitors. To avoid injury, always remove power and discharge and ground a circuit before touching it. RESUSCITATION Personnel working with high voltages should be familiar with modern methods of resuscitation. Such information may be obtained from the National Weather Service. FIRST AID Seek medical help immediately after injury. Any injury, however slight, should be treated. TEST EQUIPMENT Make certain test equipment is calibrated within required dates and is in good operating condition. If a test meter must be held, ground the case of the meter before starting measurement; do not touch live equipment or personnel working on live equipment while holding a test meter. Some types of measuring devices should not be grounded; these devices should not be held when taking measurements. WARNINGS A warning appears for an operating or maintenance procedure, practice, condition, statement, etc., which, if not strictly observed, could result in injury to or death of personnel. CAUTION A caution appears for an operating or maintenance procedure, practice, condition, statement, etc., which, if not strictly observed, could result in damage to or destruction of the equipment.Use of the MDC is based on the premise that proper output from some functional entity can only be obtained if that entity is operating properly and it has the correct inputs. The definition of a functional entity is an IC, part or functional group (Ta display, power supply, etc.). The MDC is composed of seven areas: the preliminary instructions, the procedure column, the heading, the signal specification number row, the body, the signal specification table, and the test equipment required. The preliminary instructions specify operator or technician action required to place the equipment in a checkout mode of operation. The procedure column specifies the actions required to place the equipment in the correct mode for testing. The heading lists the entities and measurement or observation points. When measurements are required, the heading lists the measurement point, a slash (/) and a second point. Unless otherwise indicated, all measurements are made with respect to chassis ground. If the heading lists a first point, a slash (/) and a second point, this means the measurement is made at the first point with respect to the second point. The signal specification number row provides a cross-reference to the signal specification table. The signal specification table describes the signal and voltage that should be present at the corresponding measurement point listed in the heading. The body of the chart traces signal/voltage paths through the circuitry of the equipment. The test equipment table lists the test equipment required to obtain the results listed in the signal specification table. Alternating blue and white columns are used to simplify the identification of symbols in the same column.Three symbols are used in the body to depict the dependency structure of the circuitry involved. INPUT ENTITY EVENT ▲--*0 ▲ A dependency marker indicates previous signals required as inputs to a functional entity in order to produce correct events. • Indicates the functional entity, whether a major function, a part, or a stage of the MDC, that produces an event. [a] Event symbol which represents a signal or indication. An event is an output which can be measured or sensed (visual, audio, oscilloscope display, etc.). Modifications to this signal are explained in the adjoining table. The following examples show the development of various dependency lines: (1) INPUT-► ACTION-► EVENT x — ■■ FUNCTION —► Z X Y Z Y A-#-0 This example shows dependency of output event "Z" upon functional entity "Y" and input event "X". (2) INPUT-► ACTION -v ACTION-►OUTPUT INPUT^ The last dependency line in this example shows the dependency of output event "T" upon functional entity "S" and events "Z" and "R".(3) INPUT INPUT ■ACTION ACTION ACTION OUTPUT R W R X S T Y z V w Ar- -m- A A— A Ar- A- This example shows the dependency of output events "Z" and "T" upon functional entities "Y" and "S", respectively. It also show the dependency of output event functional entity "V" and events "Z" and "T". upon (4) GO SELECT AN EVENT NEAR THE BEGINNING OF THE MDC THEN SELECT AN EVENT MIDWAY BETWEEN THE GO AND NO-GO EVENTS A-*® -A-A ^ [A]... -A NO-GO A—{a] IF A DEPENCY LINE HAS INPUTS TO THE RIGHT OF THE ENTITY OR EVENT, READ THE LINE AS IF THE INPUT WERE TO THE LEFT OF THE OTHER SYMBOLS. ALWAYS THINK OF ALL THE INPUTS AS BEING TO THE LEFT, ALL THE ENTITIES AS BEING IN THE MIDDLE, AND ALL EVENTS AS BEING TO THE RIGHT.This example shows how to use the MDC to locate a faulty element (or groups of elements that perform a function) in the equipment using the MDC. Once a NO-GO condition (available signal is not within specification) is found, check the signal at some event near the beginning of the MDC. If there is a NO-GO condition at the second event selected, go to the first event on the MDC and systematically check each event until the fault is found. If there is a GO condition at the second event selected, further narrow the area of concern by selecting an event located midway between the last known GO event and the NO-GO event. If this event is GO, the fault lies within the dependency structure downstream of the event. If the event is NO-GO, the fault lies upstream of the event. Repeat this procedure until a single dependency line is isolated whose event is good and output is bad. The fault lies on this line and the entity(s) identified by the dot(s) contains the fault. Note that an integrated circuit with all the correct inputs and a faulty output may not be the cause of the fault. It is possible that a short circuit exists in the input circuit of the next IC. Instead of immediately replacing the suspected IC, it might be advisable to cut the output pin that seems to be bad and measure the output again. If the output is correct, the problem is in one or more of the IC's that make up the load.Xll FIGURE 1-1. MODEL H083 HYGROTHERMOMETER SYSTEM FAMILY TREEFIELD INSTALLATION ASPIRATOR UNIT I Wl 5' LENGTH TRANSMITTER UNIT 2 120 VOLTS 1 0,60Hz 2 AMPS W2 120 VOLTS 10,60 Hz 2 AMPS W4 PHONE LINE W3 DISPLAY UNIT 3 LIST OF CABLES CABLE TYPE ACTIVE COND PI MATES WITH PI TYPE P2 TYPE Wl #8774 I4S SHLD 2JI MS3II6F-I6-26P N/A W2 SJ-14 2 ft GND TBI ft 6 LUGS N/A W3 22GA. PR 2 3JI 9IT-3260-I 6 LUGS W4 17500 2 a GND 3J2 17500 N/A INDOOR note: Wl IS FURNISHED WITH THE H083 AS PART OF THE ASPIRATOR UNIT. INSTALLATION X H* H- H* FIGURE 1-2 INTERCONNECTING CABLE DIAGRAMWhen the Display Unit is first turned on, all switches and controls may be tested in accordance with installation checkout instructions. Once started, the system is intended to run indefinitely without interruption except for repair service. Only the Display Test switch, the Fahrenheit display switch, and the display dimmer can be tested routinely. INDICATION SPECIFICATION NO. 1. Press Display Test Switch 2. Press Fahrenheit display switch 3. Operate display dimmer INDICATION SPECIFICATION All displays read -188.8 Error light flashes All indicated data values are converted and displayed in Fahrenheit Numeric Displays vary in intensity Figure 1-3. Turn-On/Checkout ChartOVERALL FUNCTION DIAGRAM KEYED TEXT (7) SENSING FUNCTION Sensing Function consists of all circuits necessary to provide a pair of electrical signals (resistance values Rta and Rtd) which represent Ambient Temperature,Ta, and Dew Point Temperature, Td. Components of the Sensing Function are located in the Aspirator Unit and in the Transmitter Unit. Physical measurement of Dew Point is made by way of a chilled mirror optical system. (2) ANALOG SIGNAL CONDITIONING This functional group receives the two resistance values representing ambient temperature and dewpoint temperature, and converts the values into a pair of DC voltage levels, Vta and Vtd, which are proportional to the two temperatures of interest. Included in the signal path is a calibrator which provides a convenient means of checking and adjusting the calibration of the system. Following the conversion to DC analog signals is a multiplex gate which allows the two channels of data to share a single output line for data transmission. Q) DATA TRANSMISSION The multiplexed analog representation of ambient temperature (Ta) and dewpoint temperature (Td) is processed into a parallel binary digital data format, still multiplexed alternately as Ta and Td. This data is presented to a parallel input port of a data processor which performs all of the necessary storage and formatting to convert the data into a serial stream suitable for transmission over a telephone-quality line. The data stream is transmitted at a 600 Baud rate, 2.5 frames of data per second. Each frame of data transmits Ta and Td values. For use in servicing the equipment, a data receiver and numeric data display are included in the data transmitter package. By switch selection, the user may select Ta or Td presented as a decimal numeric display.4 DISPLAY FUNCTION The serial data stream is received from the data transmitter and converted into a parallel format suitable for output display. Also included in the Display Function are arithmetic processes which average the Ta and Td data, and maintain current values of maximum and minimum values of Ta. Ta, Td, Tmax, and Tmin are continuously displayed on the front panel of the Display Unit. All of the data are also buffered and brought to a rear panel connector. The Power Distribution function includes all of the necessary circuits to provide and distribute AC and DC power levels to the components of the hygrothermometer. Using independent 115 volt, single phase, 60 Hz inputs at the Transmitter and Display units, voltages are developed and regulated as required. Input to the Aspirator, Unit 1, is furnished by cable from the Transmitter, Unit 2. POWER DISTRIBUTIONUNIT I ASPIRATOR UNIT 2 TRANSMITTER AMP POWER TRANSMITTER XMTR POWER FUSE n°Ni o 0 ' AGC-2A j_oJ 60 Hz UNIT 3 DISPLAY VTA/VTD DATA A/D CONVERTER PARALLEL BINARY /I TA/TD DATA PROCESSOR -I2V - 12 V DC ♦5V ►5V DC -5 V ♦5 V (A) -5V DC *5V ANALOG DC @ DATA DISPLAY FRONT PANEL DISPLAYS- LOGIC DISPLAY BATTERY POWER POWER CHARGE ♦5V DC *6V DC *9V DC ♦5V DC t6VDC *9V DC OUTPUT DATA BUS DISPLAY DISPLAY POWER OFF T 115 V 60Hz J2 DISPLAY POWER IN 4 .1 3 .2 2 .4 1 .8 6 1 7 2 8 4 9 8 23 10 24 20 21 40 II 80 22 100 10 + 16 SI 17 S2 18 S3 5 S4 20 ERROR 14 ♦5V DC 15 COMMON 12 CELSIUS V- PARALLEL OUTPUT BCD DATA AND STROBES OVERALL FUNCTION HYGROTHERMOMETER 1-3/(1-4 BLANK)PRELIMINARY INSTRUCTIONS: POWER ON WAIT 5 MINUTES DEPRESS "RESET" AND "FAHRENHEIT" SIMULTANEOUSLY SIGNAL SPEC. NO. I. AMBIENT TEMP 2. DEW POINT TEMP 3. CALIBRATOR: 3A. SET -50° 3B. SET 00° 3C. SET +50° 4. TEST SWITCH, 2S2:_ _4A. SET HEAT_ _4B. SET COOL_ 5. TMAX/TMIN_ _5A PRESS RESET 8 FAHR. 6. FAHRENHEIT, 3S2 7 MEMORY PROTECT TURN DISPLAY POWER OFF, THEN BACK ON 5-MINUTE DELAY 5- MINUTE bELAY 5-MINUTE DELAY 5-MINUTE DELAY 5-MINUTE DE RETAIN DATA MAINTENANCE DEPENDENCY OVERALL FUNCTION ASPIRATOR/TRANSMITTER, UNITS IB2 COMM. LINE DISPLAY, UNIT 3 SPEC NO SIGNAL SPECIFICATION ov \ \ PROBE XI VERT 5V/CM HOR 0.5 MS/CM SYNC. ♦ INT NOTE APPARENT PHASE ■ CHANGES WITH DATA VALUES. SIGNAL 2 IS A 13-BIT PARALLEL BCD DATA BUS ALSO INCLUDED ARE A SIGN BIT, AN ERROR FLAG AND 4 STROBE LINES FOR DE-MULTIPLEXING. LEVELS ARE TTL, 0 TRUE EACH LINE CAN SINK 24 MA AND SOURCE 15 MA CHART 1-5/(1-6 BLANK)SENSING FUNCTION KEYED TEXT © OPTIC BRIDGE The Dew Point Sensor assembly, 1A1, includes the sensing elements for both dew point and ambient temperature measurements. Dew point measurement is made by the Optic Bridge in the Aspirator Unit, in which a mirror surface is cooled and held at exactly the temperature at which a fine film of condensate forms and is maintained. The Optic Bridge includes a thermoelectric heat pump, Ul, which is electrically controlled by the Optic Control portion of the Transmit Logic PC assembly in the Transmitter Unit. A platinum temperature sensing resistor, RT2, in the mirror block assumes a resistance value exactly proportional to the mirror temperature. This resistance value is used as the basis for the Td data value. The Optic Bridge includes an infra-red LED, CRl, which illuminates a mirror block, and two photosensitive transistors, Q1 and Q2, which sense the direct and scattered reflection from the mirror. When the When the mirror is not cool enough, the direct reflection (Sd) is high and the indirect reflection (Si) is low. If the mirror surface is too cool, the opposite situation exists. The phototransistor output signals, Sd and Si, serve as inputs to the Optic Control section of the sensing function, which maintains balance between Sd and Si, holding the mirror at exactly the dewpoint temperature. Input to the bridge lamp is a 60 Hz voltage, so that Sd and Si are AC signals. (T) OPTIC BRIDGE CONTROL In the Transmit Logic PC assembly of the Transmitter Unit, the Optic Bridge Control section receives the Direct and Indirect optical signals, detects, and amplifies the difference between the amplitudes of the Sd and Si DC levels. The difference signal, amplified by U6B, is fed to the Thermo Power amplifier, Q1 and Q2 of the Auxiliary Power Supply in the Transmitter Unit. The Thermo Power amplifier produces a DC output varying between + and - 3 volts DC to drive the thermoelectric heat pump, Ul, in the Optic Bridge assembly in the aspirator. The polarity of the power output produces heating or cooling of the mirror to tend to make the Si and Sd signals equal.© Sd. LEVEL INDICATOR For use in adjusting the optic control system, Light Emitting Diode CR5 indicates when the direct light signal, Sd, is at its proper level. Sd amplifier gain is adjusted to produce +5 volts DC in the clear mirror condition. When the Sd level is at +5vdc or slightly higher, threshold amplifier U5B saturates positive, lighting CR5. (V) HEAT/COOL TEST SWITCH Also for use in testing and adjusting the equipment, the technician is provided with a switch, by which he can introduce a DC unbalance in the optic control loop, causing the mirror to heat or to cool. (E) HEAT/COOL LIMIT DETECTOR Normally, when the optic control loop is functioning, feedback amplifier U6B maintains a moderate output level, providing the necessary DC level to maintain the mirrror at the dew point temperature. In this normal condition, the voltage at the input node of U6B is virtually zero. If the loop should fail tomaintain balance because of mirror condition or component failure, U6B will assume a saturated condition, and its node voltage will increase to a relatively high value. The node voltage is monitored by high-gain amplifier U7B, driving indicators LED's CR6 and CR7. If the U6B node voltage becomes excessive in the positive or negative direction, one of the LED's will indicate the abnormal condition. The output of U7B is also used as an error input to the data transmitter, so that the malfunction can be displayed remotely. (?) TEMPERATURE SENSING Two identical platinum temperature sensors, RT1 and RT2, are located in the Dew Point Sensor assembly. RT2 is mounted in the body of the mirror and assumes the temperature of the mirror which is at the dew point. RT1 is mounted directly in the incoming air stream of the aspirator and assumes the ambient air temperature. The resistance values of RT1 and RT2 are exactly proportional to their temperatures. These resistance values are used as the basis of measurement of Ta and Td.0 ASPIRATION For the ambient and dew point sensors to function properly, an ample supply of air must be furnished. The aspirator fan, Bl, provides a stream of air for the Ta sensor and for exhausting the heat generated by the thermoelectric cooler. Threshold amplifier U21B detects when the Si level is at -3 volts DC, lighting LED CR9. This is used as an aid in adjusting Si gain. If a Td or Ta temperature value greater than +65 degrees C is sensed by the microprocessor, the overheat protect line is raised from its normal zero level to +5 volts DC. This signal, injected to the node of the differential amplifier, produces full cooling effect. Presence of the overheat protect signal can indicate a runaway Td heating condition, dirty mirror, or component failure. © Si LEVEL INDICATOR 1-9 (1-10 blank)UNIT I ASPIRATOR IAI DEW POINT SENSOR ji pi -15 ® OPTIC BRIDGE Si i4 LAMP CRI ~\ INDIRECT PHOTO SENSOR //,nr,T 02 DIRECT vwt py PHOTO 4 f SENSOR Ql TEMPERATURE (6) SENSING THERMO ELECTRIC HEAT PUMP - Ul + MIRROR MIRROR TEMP SENSOR RT 2 I HEAT/COOL POWE t RTI AMBIENT TEMP SENSOR ASPIRATION Bl ClXj twt ■ "kMP LAMI EXCITATION cz>< A dXr DIRECT SENSOR, SD CZXr THERMO POWER ClXi b£w Wiiff d>i AMBIENT TWm FAN POWER UNIT 2 TRANSMITTER 2AI TRANSMIT LOGIC (8) SI LEVEL INDICATION U2IB ® OPTIC BRIDGE CONTROL P 2 J 2 2 VAC FROM POWER DIST FUNCT R22 si GAIN® X3 U6A / / / SI AMPLIFIER- DETECTOR SI (-DC) X3 17 R2I so GAIN® 7" / U5A / SD AMPLIFIER-DETECTOR SD (+DC) RTD RTA TO ANALOG SIGNAL CONDITIONING FUNCT. 2A4 AUX PWR SUPPLY pi ji 3 DIFFERENCE AMPLIFIER OVERHEAT PROTECTION OVERHEAT LIMIT FROM MICROPROCESSOR (DATA TRANSMISSION FUNC.) +3V DC FROM PWR. DIST FUNCT. THERMO POWER AMP c 115 VAC FAN PWR. FROM PWR. DIST FUNCT -3V DC FROM PWR DIST FUNCT U7B t DC AMPLIFIER HEAT/COOL LIMIT DETECTOR UM|TS TO TRANSMIT FUNCT. (ERROR) CR6 CR7 V (3) SD LEVEL INDICATION U5B + DC LEVEL SENSOR CR5 V o SD SENSING FUNCTION 1-11/(1-12 BLANK)inr^wr’im i> n mi ii 120-n. -VDP -50° --0.4 VDC O* = -0.5 VDC + 50* • -0.6VDC © SCALING AMPLIFIERS (7) INPUT AMPLIFIERS RTD FEEDBACK +6.2V REF R20 r a RAMB 50* - 80 a 0° - 100-n. 50° - 120 sl -VAMB -50° - -0.4 VDC 0° - -O. 5VDC + 50* ■ -0.6 VDC + 62 V REF , RTA FEEDBACK r TDO / R52 TD+ / R5I TD P SCALING AMPLIFIER U9B TAO R35 r TA + / R34 / I_ TAMB SCALING AMPLIFIER U88 VOLTAGE FOLLOWER JU VREF J 6.2Vz VRI U7A £L +VDP -50°- -2VDC -0* - 0 VDC +50°- +2VDC © MULTIPLEXER VDP GATE UIOA /Z) MG A + VAMB -50° - -2VDC 0°• 0VDC +50° - +2VDC f ®Mc" VAMB GATE UIOB 6.2VDC REFERENCE -° 5V A T\ A 8. HEAT TEST A # a] 9. COOL TEST # [A IQ TA SENSING A - — — — — — — — — — A 11. TD SENSING - -- — — — — — — — — 3 - 12. ASPIRATION A - - 0 MAINTENANCE DEPENDENCY CHART SENSING FUNCTION SIGNAL SPECIFICATION VREF IS ♦ 6.2 VOLTS DC. ♦ 0.3 V RDP IS TEMP. SENSITIVE RESISTANCE AT 0° ROP = 100 n AT ♦50° RDP = 120 fl AT -50° ROP = 80 A RAMB SPEC. IS SAME AS RDP. ♦ VDP. VOLTAGE REPRESENTS DEW POINT TEMP. AT 0° VDP - 0 V AT ♦50° VDP = +2V AT -50° VDP = -2 V ♦VAMB. VOLTAGE REPRESENTS AMBIENT TEMR SPEC IS SAME AS + VDP. ♦ 4V. TA T D OV . . . PROBE: XI VERT. 2V/CM HOR. 50 MS/CM SYNC. INT* SIGNAL SPECIFICATION +4V TD TA OV PROBE: XI VERT. 2V/CM HOR. 50MS/CM SYNC. INT. + PROBE: XI VERT. 5V/CM HOR. 60MS/CM SYNC. INT. ♦ NOTE: TA AND TD VOLTAGE LEVELS VARY WITH DATA CONDITIONS h 19/(1-20 BLANK)Data Transmission receives multiplexed Vamb and Vdp DC analog signals from Analog Signal Condtioning and converts the data to a serial digital stream suitable for transmission to the remote display unit. (T) A/D CONVERTER A single-chip analog-to-digital converter, U2, converts the input Ta/Td signal to a parallel straight binary output data bus. On the bus are 12 data bits and a sign bit. The converter is fully automatic, working in synchronism with the Data Processor. The output data bus handles the parallel Ta and Td data alternately. (?) DATA PROCESSOR A single-chip microprocessor, type 68701, performs all of the timing and control functions of clocking the A/D converter through its cycle, and takes in the parallel binary data from the A/D converter. Under control of its resident program, the processor formats the data into a 600 Baud serial data stream. The processor also receives an Error indicator bit and includes it in the output format. The output serial signal is brought through a line driver, Ull, to the transmitter output terminal. Synchronism between the A/D converter and the data processor is controlled by "handshake" lines. A Status line from the A/D indicates to the processor when conversion is in process, and an output line from the processor to the Run/Hold input of the A/D signals the A/D that the processor is ready to receive new data. (T) ERROR BIT CONTROL The Limit sensing circuit in the Optic Control circuit, normally a zero level, is summed with the +5 and -5 volt DC supply levels. Under normal conditions, the summation voltage is zero, or very close to zero. In the event of a failure in the optic control, or if a power supply line should fail, an unbalance will exist,positive or negative, in the summation level. The unbalance is amplified by U3A and U3B. Whether the unbalance is positive or negative, the result will be a positive output of the OR circuit of CR3 and CR4. This positive level is brought to an input of the Data Processor as the Error bit input.Also, internal to the microprocessor, the digitized values of Ta and Td are checked continuously. If either value exceeds +65 degrees C, the Error flag is set, indicating the presence of an overheat condition or a component failure. (7) MONITOR DISPLAY Built in as a part of the Transmit Logic PC assembly is a data receiver which serves as an aid in servicing the system. This circuit, the Monitor Display, contains all of the elements of a data display system, operating independently of the transmitter circuits. The transmitter output is connected through a line receiver amplifier, U16, into a separate Type 68701 microprocessor, U15, programmed to convert the data stream into parallel Binary Coded Decimal form suitable to drive numeric digital displays. A three-digit display is mounted on the Transmit Logic PC assembly, and reads out the current value of Ta or Td, selected by a toggle switch, SI, on the card. The Monitor microprocessor shares the common 2.458 Mhz clock which serves the A/D converter and the transmitter data processor.UNIT 2 TRANSMITTER 2AI TRANSMIT LOGIC © ERROR BIT CONTROL + 5VDC -5VDC @ MONITOR DISPLAY LIMITS FROM SENSING FUNCT. "OVERHEAT" TO SENSING FUNC. MULTIPLEX GATE OUT MG TO ANALOG SIG. CONDITIONING FUNCT CD MULTIPLEXED TA/TD VOLTAGE TMX FROM ANALOG SIG. CONDITIONING FUNCT. \ ERROR DETECTOR U3, CR3-4 ERROR BIT CLOCK TO MONITOR © DATA PROCESSING H-5VDC CLOCK -•-► IN MICROPROCESSOR U I 3- ©A/D CONVERTER ANALOG INPUT kU4 D CLOCK OUT SERIAL DATA A PARALLEL BINARY DATA U4A A/D CONVERTER U2 STATUS RUN/HOLD R36 IV.UH C> LINE DRIVER AMPL. XTAL +5V -5VDC 2.458 (A) R37 CD —+6VDC REFERENCE FROM ANALOG SIG. CONDITIONING FUNCT. CLOCK 2.458 MHz l IMF LINE RCVR AMPL. U 15 MICROPROCESSOR POLARITY BIT UI7 FF CR8 ------ / T ° 1 NEGATIVE! STROBE 2 STROBE | SEL. STROBE BCD DATA BUS 3- DIGIT DECIMAL DISPLAY SEL. STROBE / / 3 D.B TEMPERATURE ® TRANSIENT PROTECTION SURGE LIMITERS T SERIAL OUTPUT DATA X3 TB2 -O- -0- -0-PRELIMINARY CONDITIONS: UNIT 2 (TRANSMITTER) POWER ON SIGNAL SPEC NO = .....- — _l_ _2 ---- .. _ i 3_ --- — - - - — _4_ _5_ -— --- --- — - -■ ---- —-- ------ -- -- —— — - - ■ • ----- — ---- ----- — ----- --- --- 1. PARALLEL DATA ”” A -- - z: — -- -- :::: • T — 2. A - TO - D CONVERSION ▲ At — -— -A ------- --- # — — —— - ♦ A 3. SERIAL DATA ▲ - - * A 4. DATA PROCESSING A __ ------ -- -- — nn ---- ..... . ---- A A 5. CLOCK □ □ ■ r 6. STATUS ▲ A Mk 7. SERIAL OUTPUT DATA A A 8. ERROR FLAG A -- — A 9. MONITOR DATA Ar -- - — — ------- « — — ----- --- ------ --- ---- A 10. MONITOR DISPLAY • \K II. MONITOR DATA PROCESS ""XI • 0 12. MONITOR TA A # [a 13. MONITOR TD A Ml ri [a] LJ W 14. NEGATIVE SIGN A nn M --- ♦ a! Jm 15. DISPLAY O.I'S □ • [a] 16. DISPLAY I'S □ >A # A A 17. DISPLAY 10’S □ A I A 18. SELECT STROBE A — A A • □ 19. OVERHEAT INDICATION A — — — - - — m A MAINTENANCE DEPENDENCY CHART DATA TRANSMISSION FUNCTION SPEC NO SIGNAL SPECIFICATION 1 TA TD OV PROBE: XI VERT 5V/CM HOR. 50MS/CM SYNC. INT + TA 8 TD VOLTAGE LEVELS VARY WITH DATA VALUES VREF IS +6.2 VDC ±0.3V — Ov PROBE: XI VERT -2V/CM HOR. .2MS/CM SYNC + INT — OV > PROBE: XI VERT IV/CM HOR. 5MS/CM SYNC. +INT NOTE APPARENT PHASE SWITCHES WITH -DATA MESSAGE SAME AS NO 4, BUT ±IOVDATA DISPLAY FUNCTION KEYED TEXT GENERAL The Data Display Function is the output portion of the system. It receives the transmitted serial binary multiplexed Ta and Td data stream and converts the data into format suitable for panel display. Arithmetic manipulations are performed on the data, including 5-minute averaging of Ta and Td, and recording maximum and minimum Ta. Data quality checks are performed, and the four data outputs, Ta, Td, Tmax, Tmin, are displayed on the front panel. © DATA PROCESSOR A Type 68701 single-chip microprocessor performs virtually all of the timing and logical functions of the receiver. Data is brought through a line receiver amplifier to the serial input port of the processor. Under control of the resident program, the processor gathers, computes, and stores the pertinent data. Output from the processor is on a 13-bit parallel bus which is time-multiplexed to Ta, Td, Tmax, and Tmin. As each of the data words is on the bus, a unique strobe pulse is generated, one for each of the four outputs. The data bus and the pertinent strobe are connected to each of the output display subassemblies on the panel. Output data is normally presented in degrees Celsius. © NUMERIC DISPLAY The Display assembly, 3A4, located behind the Display Unit front panel contains four identical 4-digit numeric plug-in display modules, for Ta, Tdp, Tmax, and Tmin. Each module consists of 5 latch/decoder/driver IC' s and four incandescent decimal display elements. The drivers are connected to the common data bus, and are sampled by strobe lines, S1-S4. Each strobe line controls one of the four displays. Once each 37.5 seconds, all four display modules are updated. Q) ERROR INDICATION When the error flag bit is received from the transmitter, or when certain other error conditions are detected by the receive logic, the Error output level goes high. This turns on a 2 pulse-per-second multivibrator, U2B,which flashes an Error LED indicator on the front panel.@ DISPLAY BRIGHTNESS CONTROL Built into each of the latch/decoder/drivers in the display modules is a blanking input. The blanking control line is driven by 100 pulse-per-second multivibrator U2A through one-shot U3 with controllable output pulse width. When the blanking line is up, the displays operate at full intensity; when the line is at zero , the displays are off. The positive pulse width of the blanking control line is controlled by the Display Dimmer control on the front panel, so that the average voltage on the pulsed line governs the apparent intensity of the displays. (?) FAHRENHEIT DISPLAY SELECTOR The system output display is normally in degrees Celsius. At any time the operator may select Fahrenheit display by depressing the Fahrenheit Display pushbutton on the front panel. The button is momentary-action, so that the displays automatically revert to Celsius when the button is released. All four of the displayed values, Ta, Td, Tmax, Tmin, are affected by the Fahrenheit display selection. The conversion to Fahrenheit is controlled by software resident in the processor. The output BCD data is also affected by the Fahrenheit Display selector. (?) MAX/MIN RESET The Tmax and Tmin displays may be reset to the present value by depressing the momentary Reset switch. To guard against accidental resetting, the Reset switch is connected in series with a pole of the Fahrenheit switch, so that both the Fahrenheit and the Reset switch must be pushed simultaneously to reset the Max/Min display. 0 DISPLAY TEST SWITCH As a test of all the segments of the displays, depressing the momentary Display Test Switch causes all of the displays to indicate -188.8 degrees. In Display Test, the Error indicator is also caused to flash. (?) MEMORY PROTECTION In the event of a momentary or prolonged power failure, the critical part of the data processor memory remains active, powered by a small battery located on the Receive Logic PC assembly. This battery is trickle-charged during normal operation, and has enough capacity to protect the memory for approximately 10 hours. Memory protection retains Tmax, Tmin, and the averaged values of Ta and Td.The multiplexed BCD data bus, which includes Ta, Td, Tmax, and Tmin data in sequence is buffered and brought to J3 on the rear panel of the Display Unit. Also brought out for external use are the data strobe lines, S1-S4, the Error bit, the +5 volt DC supply line, common line, and the Fahrenheit/Celsius select status. (10) AUTO RESET Q1 and Q2, with their associated circuitry, form a level-sensitive one-shot multivibrator. If the +5 volt DC line drops below 4 volts, when power is removed or is about to fail, the circuit holds Ul pin 6 low, resetting the computer in an orderly manner. This reset does not affect the stored, protected data. Display Test also triggers the Reset circuit. (11) DATA TEST SWITCH Toggle switch S5, mounted on the rear panel of the display unit, permits the operator or technician to operate the display unit in the Monitor. The switch positions are labeled INSTANTANEOUS and AVERAGING. Normally, the averaging mode is used. When the switch is in the instantaneous position, Ta and Td data values are displayed as immediately as received, and are not subjected to the 5-minute averaging program. Also, in this mode, the Tmax and Tmin displays are not operative. Since the Instantaneous mode is for test purposes only, and should never be used in normal operation, the Error light is flashed at all times when the test switch is in the Instantaneous position. 1-29 (1-30 blank)UNIT 3 DISPLAY Pi Jl 9 SERIAL DATA IN X r .1 (7) DISPLAY TEST (5) FAHRENHEIT SELECT (8) MEMORY PROTECTION BATTERY CHARGE ' 4.8 V BATTERY + 9 VDC vVSA-ft— REF POWER DIST FUNCT..... © MAX/MIN RESET PRESS @ RESET MAX/MIN S3 \ ru ©DATA TEST SWITCH SURGE PROTECTION I LINE XFMR @ DISPLAY XI BRIGHTNESS H7] -k 3AI RECEIVE LOGIC BLANKING ;r~ © NUMERIC DISPLAY 3A4 DISPLAY ASSY I- STROBE I (TA) ■/ 14 DATA BUS .1 .2 4 .8 I 2 4 8 10 20 4 0 80 100 + ////////////// BCD KD DATA BUS BLANKING ir s -JI rr 11 .1 .2 4 .8 I 2 4 8 10 20 40 80 100 + STROBE 4 (TMIN) STROBE 3 (TMAX) B 81097 L43KE JF DC2 XI £ DATA BUS ft wwwwwww TT OUTPUT J3 DATA S 17 .7 y 16 T s' 15 A s' 14 i~ s' 19 r s' 20 "2 s' 21 4" S' 22 8" s' 10 10 s' II 20 s' 8 40 s' 24 80 s' 9 ioo s' 23 + s' 3 Si s' 4 S2 s' 5 S3 s' 18 §4 s' 7 ERROR s' 1 + 5VDC s' 2 COMMON s' 25 FAHR. \ OUTPUT BCD DATA OUTPUT DATA BUS w II DATA BUS X2 B 8 10 97 L43KE JFDC2 STR BLK I .2 4 8 I 2 4 8 10 20 4 0 80 100 + NUMERIC DISPLAY 3A4AI TA STR. BLK. .1 .2 .4 .8 1 2 4 8 10 20 40 80 100 + NUMERIC DISPLAY 3A4A2 td c X3 )h b 8 10 9 7 L 4 3KEJFDC2 ■ .1 .2 .4 B 1 2 4 8 10 20 4 0 80 iOO + NUMERIC DISPLAY 3A4A3 TMAX TT wwwwwww ( 1 |H B 8 (0 97L43KEJFDC2 3A4A4 .1 .2 4 .8 1 2 4 8 10 20 40 80 iOO + NUMERIC DISPLAY TMIN X4PRELIMINARY CONDITIONS-- ALL UNITS ON SIGNAL SPEC. NO. I. INPUT DATA 2. DATA PROCESSING 3. BCD DATA BUS 4. TA DISPLAY 5. TD DISPLAY 6. TMAX DISPLAY 7. TMIN DISPLAY 8. DISPLAY BRIGHTNESS 9. ERROR INDICATION 10. RESET MAX/ MIN 11. DISPLAY TEST 12. FAHRENHEIT 13. OUTPUT RAW DATA (NOT AVERAGED) 14. OUTPUT BCD DATA 15. MEMORY PROTECT POWER FUNCT DATA DISPLAY FUNCTION ALL UNIT 3 FAHRENHEIT MAINTENANCE DEPENDENCY CHART SPEC. NO SIGNAL SPECIFICATION PROBE: XI VERT 5 V/ CM HOR. 5MS/CM SYNC: + INT NOTE: APPARENT PHASE -SWITCHES WITH DATA MESSAGE SAME AS NO. I, LEVELS ARE 0/ + 5V PARALLEL BCD DATA, 3 1/2 DIGITS a SIGN TTL LEVEL, 5V TRUE NEGATIVE TTL PULSE, 600 USEC WIDE, REP RATE 2.5 PPS. SAME AS NO. 4 SAME AS NO 4 SAME AS NO. 4 10 +5 VDC WHEN ERROR 0/ + 2.5V SQUARE WAVE, 2 PPS TTT1 PROBE: XI VERT IV/CM HOR. 5MS/CM SYNC +INT POSITIVE PULSE WIDTH VARIES WITH DIMMER CONTROL SHOWN AT MAX. BRIGHTNESS SAME AS NO. 3, LOGIC IS OV TRUE . 24 MA SINK, 15 MA SOURCE© TRANSMITTER POWER All power for the Aspirator, Unit 1, and the Transmitter, Unit 2, is derived from a single-phase 115 volt, 60 Hz input line into the transmitter enclosure. The Aspirator receives its power from the transmitter by way of an interconnecting cable. The transmitter includes a regulated +5 volt DC logic power supply, 2A3, and the Auxiliary Power Supply, 2A4. The Auxiliary Power Supply includes a DC-to-DC converter, 2A4A1, which converts +5 volts to regulated + and - 12 volts DC for the analog amplifiers. Also included in the Auxiliary Power Supply are power transformer T1 and the + and - 3 volt rectifiers which provide unregulated DC power for the thermo power amplifier. T1 also furnishes 5 volts AC excitation for the Optic Bridge illuminator LED. © DISPLAY POWER A separate 115 volt input line provides power to the remote display unit. The display unit includes a +5 volt DC regulated supply, identical to that used in the transmitter, and a +6 volt unregulated DC supply which provides power for the numeric displays. The +6 volt supply also furnishes an unregulated +9 volt line which supplies charging current for the display standby battery. 1-35 (1-36 blank)UNIT I ASPIRATOR 2VAC REF SENSING FUNCT 115V AC 2 V DC LAMP PWR 115 V AC FAN PWR - 12V DC 2A3 *5V DC SUPPLY XMTR POWER XMTR FUSE ON OFF ‘(0) L 51 3AG O 2A X/FI d> LIN FILT E ER ' '~L I 2 I GND II5V 60 Hz, 14 3A4 DISPLAY ASSY. 3AI RECEIVE LOGIC RI7 3A4AI ♦4 8V DC ♦5V DC ~ E STANDBY BATTERY f6V DC ♦9V DC X! V A N D C d>— X2 3A2 5 8 X3 3A3 AMBIENT DISPLAY 3A4A2 DEW POINT DISPLAY 3A4A3 TMAX DISPLAY 3A4A4 + 5V DC SUPPLY +6V DC SUPPLY T MIN DISPLAY X2 3 I C5> FILTER- RECEPTACLE ON OFF DISPLAY POWER X/FI J2 3AG O I DISPLAY 2A ■ FUSE GND i i 115V 60 Hz, 14 POWER DISTRIBUTION FUNCTIONPRELIMINARY CONDITIONS: ALL POWER ON SIGNAL SPEC. NO 1 2 3 4 5 6 7 8 9 1 2 10 10 10 10 II i2 1. TRANSMITTER A LJLJLJ A IA. +5VOLTS DC Jk A IB. +5V0LTS DC (A) Jk A IC. —5 VOLTS DC Jk A ID. +12 VOLTS DC A «► — A IE. +3VOLTS (HEAT) □ nn A "T A — L lk A iL IF -3 VOLTS (COOL) n * 1# A ■■ IG. 2 VAC (LAMP) n ♦ A IH. -12 VOLTS DC At K 2. DISPLAY UNIT Ar nnn A 2A. +5 VOLTS DC A 1 A_ Jk 2B. +6VDC (DISPLAY) A A X 7 2C. +9 VOLTS DC a n k. ^ a" M. 2D. BATTERY CHARGE Jt * 7 - — MAINTENANCE DEPENDENCY CHART POWER DISTRIBUTION FUNCTION . .. SPEC NO SIGNAL SPECIFICATION 103-127 VOLTS, 55-65 HZ. + 5 VOLTS DC ±0.1 VOLT. +12 VOLTS DC ± 0.1 VOLT. -12 VOLTS DC ±0.1 VOLT. HALF-WAVE RECTIFIED AC, PEAK VALUE +7 VOLTS + 1.5 VOLT. FULL-WAVE RECTIFIED AC, PEAK VALUE -7 VOLTS ± 1.5 VOLT. 60 HZ, 5.6 VOLTS PEAK-TO-PEAK t I VOLT + 5 VOLTS DC, ± 0.1 VOLT. -5 VOLTS DC, ± 0.1 VOLT + 6.5 VOLTS DC, ± I VOLT + 9 VOLTS DC, ± 2 VOLTS.ASPIRATOR UNIT KEYED TEXT The Aspirator Unit is co-located outdoors with the Transmitter Unit, and receives its power from the Transmitter. Sampling of the ambient and dewpoint temperatures is controlled by the Aspirator. (7) C-SEN-1 The Dew Point Sensor assembly is a line-replaceable unit, containing all of the sensing elements for dew point and ambient temperature measurement. It is physically constructed on a printed circuit board, connected by plug to the aspirator wiring. Inputs to the sensor are lamp power and thermoelectric drive power. Outputs consist of two resistance values, representing ambient temperature (Ta) and dew point temperature (Tdp), and two optic sensor output signals, Si and Sd, for controlling the mirror temperature. (7) M-FAN-1 An axial blower, Bl, supplies air flow through the aspirator unit to provide for atmospheric sampling and also to furnish cooling air for the thermoelectric element heat sink in the Dew Point Sensor assembly. 2-1 (2-2 blank)© C-SE N-l DEW POINT SENSOR ASSY P/N 1063-104 A I (i) M-FA N-l JI PI 17-10150-1(390) CRI TIL-31 r@h (LED) 15 r—( ui 13 >T< THERMOELECTRIC HEAT PUMP cr 1063-1044 RTI PT-I39AP -Haaa>- TA r- R! RT2 PT-I39AP TD -wv- R2 14 1,9 2,3 12 5 cr >T< o >T< cr 6 10 8 cr > 1 Bl 1063-108 ^FAN^j < M J G K L P2 MS3II6- 16-26P SCHEMATIC DIAGRAM ASPIRATOR UNIT 2-3/(2-4 BLANK)DEW POINT SENSOR KEYED TEXT The Dew Point Sensor subassembly in the Aspirator Unit includes all of the active elements of the Aspirator Unit except for the air blower. (7) X-LED-1 CRl is an infrared light-emitting-diode (LED). Its output wavelength is approximately matched to the response peak of the sensor phototransistors. The output of CRl is directed at a mirror surface at an angle of 45 degrees. (?) Q-SEN-1 Q1 is an NPN silicon phototransistor. It is aligned so that it receives the directly reflected rays from illumunator CRl. Its output is called Sd. (?) Q-SEN-2 Q2 is identical to Ql, but aligned perpendicular to the mirror surface, so that it is sensitive to the light rays which are scattered when the mirror surface is clouded or frosted. Its output is called Si. @ U-THM-1 Ul is a thermoelectric heat pump which cools or heats the mirror block. When positive current flows through Ul, the mirror heats; when negative current flows through Ul, the mirror cools. Maximum current is approximately 4 amperes DC. (?) R-SEN-1 RT1 is a platinum wire-wound resistive temperature sensor. Its resistance at 0 degrees C is exactly 100 ohms. RT1 has a stable coefficient of resistance vs. temperature of 0.4 ohms per degree C. It is mounted directly in the path of the air drawn into the Aspirator, and its resistance is used for measuring ambient temperature. Its resistance value is called Rta. (?) R-SEN-2 RT2 is identical to RT1, but it is mounted inside the mirror body, so that the resistance of RT2 is a measure of the mirror temperature. The resistance value is called Rtd. 2-5 (2-6 blank)NOTE: Rl AND R2 ARE FACTORY SELECTED NON. VALUE 47 K , 5%, 1/4 WATT © X-LED-I CRl TIL-31 2) Q-SEN-Q I TIL-81 D Q-SEN-2 Q2 TIL-81 © U-THM- I 1063-1044 Q LU cr o < QQ R-SEN-1 RT I PT-I39AP — -VvV R-SEN-2 RT2 PT-I39AP —(-^-4- ■AAAr R 2 1 7 1,9 2.3 6 8 10 JI 745062-4 SCHEMATIC DIAGRAM DEW POINT SENSOR 2-7/(2-8 BLANK)TRANSMITTER UNIT KEYED TEXT The Transmitter Unit is co-located outdoors with the Aspirator Unit. Input to the Transmitter unit is 115 Volts AC. Output is a serial data stream to the remote Display Unit. A short interconnecting cable to the Aspirator connects aspirator power and signals. (7) N-FL-1 A packaged filter assembly provides isolation against power line interference in both directions, and protection against short (microseconds) voltage transients. (?) C-PWR-1 Power switch SI and 2 ampere fuse X/FI (2 ampere) control the AC input to the Transmitter and Aspirator Units. The fuse is accessible when the Transmitter door is open. The 5 volt DC power supply provides regulated +5 volts DC. It is rated at a load of 1.5 amperes. The Auxiliary Power Supply assembly, a line-replaceable unit, contains a DC-to-DC converter which receives + 5 volts DC and converts to + and - 12 volts DC. The Auxiliary Power Supply also houses the power amplifier which drives the thermoelectric heater/cooler in the dew point sensor. The + and - 12 volt outputs are each rated at 0.1 ampere. (?) N-CAL-1 The Calibrator is an assembly of precision resistors and a double-pole four-position switch. It substitutes fixed resistance values in place of the resistive temperature sensors for checking accuracy of the instrument circuits.(?) C-LOG-1 The Transmit Logic assembly is a plug-in printed circuit assembly which contains all of the logic and control circuits necessary for controlling temperature sensing, data formatting and data transmission. The output of the Transmit logic is connected directly to the output transmission line. Also included in the assembly is a numeric display monitoring the transmitted data. S2, a momentary toggle switch, enables a technician to force the dew point mirror to a high or low temperature for testing purposes. When the switch is released, it assumes the normal operating position, and control of the mirror temperature returns to the automatic system.(7) N-FL- Jl MS3II4E-I6-26S 115 VAC TO FAN 2 VAC TO LAMP THERMO POWER GND TA SENSOR TD SENSOR DIRECT OPTICAL SENSOR INDIR. SENSOR COMMO K L M N R P C D H J G F B E A C-PW R— I X/FI 2 AMPS Ot^O 4 5 O-L-^O MAIN POWER SPRAGUE 2JX5I02A I 2 3 TBI AC GND AC 15 VAC INPUT (S) c-ps-i 15 J2 AMPHENOL 17-10090-1(390) HEAT/COOL POWER 23456789 1“ @ C-PS-2 6,7 fT 2A4 AUX. POWER SUPPLY P/N 1063-203 13 \Z 10 X 2 2A3 5 VOLT DC SUPPLY P/N 1063-202 07 5) N-CAL- ■O -50< OPR BALANCE HEAT/COOL CONTROL RI SR2 >79.95?I0Q00?119.75 6+50 O R4 SR5 S R6 |79.95 vOOOOSI 19.75 -50C 0< Ol 2 w 15,16 + I2V DC — 12V DC 12 + 5V DC 10,11 fi ' r 21,22 0+50 40 ^ 17,18 w 19,20 ?SD 2AI TRANSMIT LOGIC PC. X 3 © C-LOG 0 COOL O +12 V S 2 HEAT /COOL © S-SW-I TEST 0 HEAT !-► —12 V n L si 9 COM 14 I 3 TB2 SIGNAL OUTPUT f SCHEMATIC DIAGRAM TRANSMITTER UNIT 2-11/(2-12 BLANK)TRANSMIT LOGIC KEYED TEXT The Transmit Logic card is the main logic controller for the Transmitter Unit. Its circuits control mirror heating and cooling to maintain dew point temperature at the mirror surface, and it processes the Ta and Tdp resistance sensor values into a serial digital data stream for transmission to a remote receiver. The card also contains a simple data receiver and local numeric data display for use in servicing the equipment. (?) C-DET-1 U5A and CRl are connected as an "ideal diode" detector circuit. The direct sensor signal is coupled through Cl to the non-inverting input of U5A. U5A output is rectified positive by CRl, charging C2 to the average value of Sd. The detected level on C2 is fed back to U5A inverting input through R21. Gain of the detector is adjusted by the setting of R21. Typical operating level of C2 voltage is +4 volts DC. (?) C-DET-2 U6A, CR2 and C4 function essentially the same as U5A, negatively detecting the indirect sensor (Si) signal amplitude. R22 serves as the stage gain adjustment. Typical operating level on C4 is -4 volts DC. The positive Sd level and the negative Si level are summed through 100K resistors into the inverting input of U6B. U6B output, representing heat/cool control, is brought out to the thermo power amplifier in the Auxiliary Power Supply. If the mirror surface is too warm, making Sd too high and Si too low, U6B output tends to go negative, producing more cooling power, and vice versa if Si is too high and Sd too low. R65 and C5 across the Si input resistor improve response and stability of the control loop. Special inputs controlled by the microprocessor are also brought into the loop by way of R77. These inputs are described under C-AMP-5.(?) C-DET-3 U5B is a threshold amplifier. If its input, pin 5, is at less than +5 volts DC, its output is at negative saturation. If its input is greater than +5 vpolts, the output is at positive saturation, lighting LED CR5. CR5 serves as an adjustment level indicator for Sd gain. (?) C-DET-4 U21B operates much the same as U5B, using the negative Si signal as its input. If Si is more positive than -3 volts, LED CR9 is off. When Si is more negative than -3 volts, CR9 is lit, indicating an adjustment level for Si gain. (?) C-DET-5 During normal operation, the node, pin 6, of control amplifier U6B, is at virtually zero because of its feedback. If the control loop should open for any reason and U6B goes to saturation, the node voltage will rise to a relatively high voltage. This voltage is monitored by U7B. Normally U7B output is close to zero, but when U6B saturates, U7B output will rise positive or negative, lighting either CR6 or CR7, indicating a fault condition. (?) C-AMP-2 U8A is a feedback amplifier which uses the ambient temperature sensing element as its feedback resistor, so that U8A output DC varies precisely with Ta. At 0 degrees, the sensor resistance is 100 ohms, and U8A output is -0.5 volts. In the scaling amplifier U8B, an offset correction is introduced through R14, making U8B output zero at zero degrees. Feedback of U8B, through R16, has been selected so that 50 degrees is represented by exactly 2 volts. Trimpots R35 and R34 provide a means of making minor adjustments in the offset and gain values for instrument calibration. The dew point instrument voltage channel, U9A-U9B, is identical to U8A-U8B, using the dew point sensor resistance as the controlling element.© C-MUX-l U10A and U10B are sections of a CMOS analog gate. U10A controls the Ta voltage; U10B controls the Td voltage. The gates are alternately opened and closed by a Ta/Td selector line from the microprocessor. When the control line to a gate section is high, the signal is passed through. When the control line is low, the signal is blocked by the gate. Using alternate control lines and tying the two gate outputs together results in an output signal which is at the Ta DC level for 200 milliseconds, then at Td DC for 200 milliseconds, continuously alternating. © C-CON-1 U2 is a CMOS Analog-to-Digital converter, using the Ta/Td multiplexed signal as its input. Output of the converter is a 12-bit straight binary representation of the input levels, with an additional bit for the polarity. The converter works in conjunction with the microprocessor, Ul, exchanging control and timing signals. U2 is a Type 7109 chip, operating on the dual-slope integration principle. Output scaling and the essential accuracy of conversion are determined mainly by R53, CIO, and the reference voltage applied through a divider to pin 36. The "Status" output tells the microprocessor when a conversion is complete. The 2.458 MHz crystal clock signal generated by the converter is also used by the microprocessor. Parallel-to-serial data conversion and output signal timing and formatting are controlled by Ul, a Motorola Type 68701 microprocessor. This 8-bit processor contains a 128 byte RAM and 2048 bytes of erasable and programmable ROM. Although the processor is pre-programmed, it is removable and may be re-programmed or modified. Three 68701 processors are used in the H083 system, two in the Transmit Logic and one in the Receive Logic assemblies. All of the 68701's are programmed identically and are interchangeable. Ground connections on pins 13 and/or 14 determine which section of the program will be used in each part of the system. I-PRO-1Pins 13 and 14 are inputs to the microprocessor, and during the start-up part of the program, the processor scans the condition of pins 13 and 14. Depending on the combination of grounds or opens (logic 1 or 0) on the two pins, the program is directed to the "transmit", "monitor", or "display" section of the resident program. The 12-bit binary data and sign bit are tied to input ports of Ul and the data is input when the program calls it up. The Ta and Td data words are alternately processed and brought out as a seriaal 600 Baud bit stream, still in straight binary code. The transmission signal is formatted as a Manchester code, in which the signal line is toggled at a 600 pulse-per-second rate, and logic l's are indicated by a transition at the half-period point. At the receiving end, the detector is insensitive to signal polarity and does not require a separate clock input. The data stream also includes various formatting and check bits used internally by the processor. As the processor alternately processes Ta and Td, it toggles the Ta/Td select line which controls the multiplex gates. An error bit, indicating the presence of certain fault conditions in the transmitter, is included in the output data for use by the remote display unit. Complete details of the microprocessor software are given in Appendix B to this manual. (l2) C-AMP-4 U3A and U3B monitor the dew poiunt "limit" signal line which indicates faulty operation of the mirror control loop. This signal, which may be positive or negative, is brought to the inverting input of U3A and the non-inverting input of U3B. The two amplifier outputs are positive-OR1ed through CR3-CR4 as the error bit input to the microprocessor. Also summed into U3A and U3B inputs are the + 5 volt (A) and the -5 volt DC supply lines. Since the + and - 5 volt DC lines are equal and opposite, they cancel out in the summation, but in the event of a failure or change in level of one of the lines, the error input balance is upset and the error bit line is raised.I-AMP-1 A Type 1488 level converting line driver is used as the transmission line driver to the remote displays. Output binary levels are balanced at approximately +/- 6 volts with respect to ground. R66, C16, and surge limiter SLl protect the line amplifier against transient spikes from the transmission line. U12r a Type 555 timer IC, is connected as a monostable (one-shot) multivibrator. Its input control point, pin 2, is connected to the +5 volt DC logic power line. When the + 5 volt line is low, or during a negative-going transient on the line, the timer produces a positive-going pulse output at pin 3. This pulse is inverted by U4E and fed to the reset input of microprocessors Ul and U15. This insures that the processors are reset when power is first applied, and that they are also reset if power fails momentarily. © C-REG-1 Reference diode VRl, driven by +12 volts DC through R49, establishes a stable 6.2 volt reference level for use by the Ta and Td signal amplifiers and the A-to-D converter. The 6.2 volt level is buffered by U7A in the non-inverting voltage follower configuration. (16) I-PWR-1 Using the +12 volt DC line as input, U13 provides a regulated +5 volt line for critical analog circuits. This line is referred to as +5 volts (A). (17) I-PWR-2 Using -12 volts DC as input, U14 provides a -5 volt DC line for use by the multiplex gates and the A-to-D converter. (18) I-AMP-2 U16, a line receiver identical to that used in the remote display, samples the output data line, providing the input signal for the monitor display in the transmitter. (19) I-PRO-2 A Type 68701 microprocessor, identical to Ul, receives the output data stream and performs all of the necessary processing and conversion to drive the local 3-digit Ta or Td monitor display. C-PG-1This processor, U15, uses the 2.458 MHz clock signal generated by the A-to-D converter. Output of U15 is a 12-bit BCD data bus, a sign bit and two strobe lines, SI and S2, for selection of Ta or Td display. A 3-digit numeric display is mounted on the PC assembly for use in servicing. The display elements, U18, U19, U20, are plug-in and interchangeable. They are dot-matrix decimal displays and include storage registers, storing and displaying the data value on the lines at the instant of the trailing edge of the strobe pulse. Display selection of Ta or Td is made by selecting Strobe 1 or Strobe 2 by way of switch SI. Negative polarity is displayed by LED CR8, controlled by flip-flop U17A. The sign bit is connected to the flip-flop aata input and the selected Ta or Td strobe is the clocking input. Control of the dew point mirror temperature is independent of the microprocessor, with two exceptions: In the event of the mirror overheating because of a system failure, the microprocessor senses when the mirror temperature (Td) is 65 degrees C or greater. In this condition, pin 24 of the microprocessor is set high. This signal, through U21B, applies full cooling signal to the heat/cool control amplifier U6B. Also, during the automatic 24-hour mirror drying cycle, the microprocessor sets up pin 15, causing full heat control signal to be applied. Both of the microprocessor-controlled signals are brought through U21B and R77. D-DIS-1 I-FF-1@ I-PWR-2 UI4 SG-320 -5 VDC TO TA +VREF. ,RI.3. SENSOR 6.2V TO TD SENSOR (20) D-DIS-1 S07KI4 SERIAL DATA OUTPUT SCHEMATIC DIAGRAM TRANSMIT LOGICCALIBRATOR KEYED TEXT GENERAL The Calibrator subassembly of the Transmitter Unit consists of a double-pole, four position switch and a set of ultra-precise resistors. It enables a technician to substitute standard resistance values in place of the ambient and dew point sensing resistors to test and/or adjust instrument accuracy. When the calibrator switch is in its normal (Operate) position, the standard resistors are out of the circuit. When in the 00 position, 100.0 ohm resistors are substituted for the sensors. In the - 50 position, 79.95 ohm resistors are substituted, and in the + 50 position, 119.75 ohm resistors are substituted. These values represent exactly the resistance which would be presented by the sensors at the test temperatures. 2-21 (2-22 blank)7 2 8 3 RESISTOR VALUES ARE IN OHMS. RI-R6 ARE ±.02% SCHEMATIC DIAGRAM CALIBRATORThe 5 volt Power Supply receives 115 volts AC input and delivers regulated +5 volts DC with an output capacity of 1.5 amperes. This unit is used in both the Transmitter and Display units. (?) C-PWR-1 Tl, rectifier bridge CR1-CR4 and Cl comprise an unregulated +8 volt power supply. (?) I-REG-1 VRl, an LM-323 integrated circuit, regulates the +8 volt level to + 5 volts DC output. C2 provides additional filtering. 0 X-LIM-1 VR2, a power zener diode, limits the output of the power supply to about 7 volts in the event of failure of VRl. 2-25 (2-26 blank)© c- PWR- I © I- REG- I Tl SIGNAL 1.5 AMP OUT SCHEMATIC DIAGRAM 5 VOLT POWER SUPPLY 2-27/(2-28 BLANK)AUXILIARY POWER SUPPLY KEYED TEXT The Auxiliary Power Supply is a line replaceable unit, plug-connected inside the Transmitter Unit. It includes a + 5 volt to +/- 12 volt DC converter, and a power amplifier for the mirror heater/cooler. Transformer Tl, CR1-CR2, and C1-C2 are connected as a full-wave -5 volt DC unregulated power supply. This -5 volt DC level serves as the power source for mirror cooling. CR3 is a half-wave rectifier providing unfiltered +DC power for mirror heating. The power is pulsating DC with a peak level of approximately +7 volts. Power transistors Q1 and Q2 form a complementary PNP-NPN power amplifier furnishing DC current as required by the mirror heater/cooler element. Each of the transistors is a Darlington type, so that a very high current gain is obtained, matching the extremely low resistance of the thermoelectric module. The PNP transistor, Ql, controls negative output for cooling, and the NPN transistor, Q2, controls positive output for heating. Voltage gain of the amplifier is about 0.6. (7) C-OSC-1 Ql, Q2, and toroidal transformer Tl, are connected as a square-wave oscillator operating at approximately 10 KHz. This circuit uses +5 volts DC input and produces a 36 volt square wave output. CR1-CR4 form a full-wave bridge rectifier, yielding + and -18 volts DC. The outputs are filtered by C2 and C3.(£) I-REG-l VRl receives +18 volts and provides a regulated +12 volt DC output, filtered by C5. (7) I-REG-2 VR2 receives -18 volts DC and produces regulated +12 volts, filtered by C4. (T) X-LIM-l Surge limiters SLl and SL2 protect the system against short (microseconds) duration line transients. SLl absorbs transients between the lines; SL2 absorbs transients from line to ground.Tl 241-7-10 ® C-PWR-I CRl -KF INI200 10V CT CR2 INI200 Cl C2 4000/uf 115V Hi--jlo' CR3 X-RCT-I (DQ-AMP-I Ql 2N6050 Q2 2N6057 PC SUB ASSY. 1063-2031 0C-OSC-I Tl PICO 4831 Rl —wv 68 -© Ql 2N5320 Q2 2N5320 6 (8) X-LIM-I R 7 Wr 100 SLl S07KI50 m C7 .0068/600V SL2 S07KI50 m- C-RCT-I CRl IN400I (6) I-REG-1 VRl 78MI2 +12V REG + I8V CR4 IN400I CR2 IN4001 -l_+C2 -lOuf E B C „R5 4700 12 ^L-4 C3 - lOuf —18 V --+ C5 T- 2.2 uf E C B _L C4 “T- 2 .2uf VR2 79MI2 - 12V REG ©l-REG-2 R6 A/W .47 4—«- C6 n .47 6 7 13 14 8 15 10 12 In 115 VAC LAMP THERMO -\/-^ COM. +5VDC -I2VDC +I2VDC INPUT POWER CONTROL THERMO in OUT OUT OUT INPUT POWER OUT JI 745103-1 SCHEMATIC DIAGRAM AUXILIARY POWER SUPPLY 2-31/(2-32 BLANK)DISPLAY UNIT KEYED TEXT The Display Unit is designed for indoor installation at the operator's working location. It receives a serial data transmission from the Transmitter/Aspirator via phone line, and presents numeric front panel displays of Ambient Temp, Dew Point Temp, Tmax and Tmin. Certain arithmetic functions are performed on the data before the data is displayed. The Display Unit also controls an output BCD data bus which may be used for external data processes. A packaged line filter, physically a part of the AC input connector J2, provides isolation against power line interference and short (microseconds) duration transients. Main power switch SI and the 2 ampere line fuse X/FI control input AC power. Both are located on the rear panel of the unit. The Display Power Supply furnishes regulated +6 volts DC as main power to the display modules on the front panel. The supply is rated at 4 amperes output. A separate output, 9 volts DC unregulated, furnishes battery charging power to the memory protection battery in the Receive Logic assembly. @ C-PWR-3 A 5 volt regulated power supply furnishes logic power where needed in the Display Unit. This power supply is identical to and interchangeable with the 5 volt supply used in the Transmitter Unit. (?) C-LOG-1 The Receive Logic assembly, a plug-in printed circuit card, contains all of the logic circuitry which controls the Display Unit.© C-DIS-1 The Display subassembly consists of a "motherboard" with 4 identical numeric display modules plugged into sockets. The subassembly is located just behind the front panel. A common BCD display data bus is connected among the display modules, multiplexing data for the four displayed values. A unique strobe line is connected to each of the four modules, so that each module reads the data only when its own data value is on the bus. The Data Test switch, S5, is located on the rear panel, and is used only for test purposes. When the switch is in the INST (instantaneous) position, Ta and Tdp values are displayed as received from the transmitter. When the switch is the normal AVERAGE position, the data values are averaged and screened for errors before they are displayed. In the INST mode, the Tmax and Tmin displays are not updated. (?) S-SW-2 53, the Max/Min Reset switch, when depressed momentarily, resets the Tmax and Tmin displays to the present value of Ta. To guard against accidental operation of reset, the switch is connected in series with a pole of the Fahrenheit display switch, S2, requiring that the Fahrenheit switch must be pressed simultaneously with the Reset switch. (?) S-SW-3 54, the Display Test switch, when depressed, causes all numeric displays to read -188.8 to verify that all segments of the displays are functioning. This action also causes the Error indicator to flash. When S2, the Fahrenheit Display switch is depressed, all four data displays read out in degrees Fahrenheit, instead of Celsius. The output BCD data is also presented in degrees Fahrenheit. Potentiometer Rl, Display Dimmer, controls brightness of the numeric displays. S-SW-4 R-RES-1(12) X-DIS-1 DS1, Error Indicator, indicates the presence of various error conditions which may be detected in the data. In the case of a sustained error condition, DS1 flashes at a rate of about 2 pulses per second. DS1 also flashes constantly when the test switch, S-SW-1, is in the Instantaneous position. @ B—BUS-1 Mounted on the rear panel is a 25-pin D style connector which brings out the BCD multiplexed data bus, all strobe lines, the Error bit, a +5 volt DC and common line and a Celsius/Fahrenheit select status line. The output lines are buffered for loading by external equipment, and to prevent external shorts affecting the internally distributed data. 2-35 (2-36 blank)115 VAC IN ©S-SW-2 ®S-SW-3 @ S-SW-4 © S3 RESET TMAX / TMIN -Q S4 DISPLAY TEST X Q N-FIL-I ©C-PWR-I C-PWR-2 @ C-LOG-1 J 2 FILTER/RECEPTACLE 3EFI x/FI +9 VOLTS DC X S2 FAHRENHEIT-CENTIGRADE -0<0- O—i R-RES-1 R I DISPLAY DIMMER JI INPUT SIGNAL 9I-T-3263-9 CCW + 5V DC CW 25K @ X-DIS-I DSI ERROR J. LED - M Y V N HR K 3 A I RECEIVE LOGIC PC ASSY 1063-303 .1 .2 4 .8 I 2 4 B _ L 8 10 20 40 80 100 + K SI S2 S3 S4 6V COM 22 21 20 19 18 17 16 15 14 13 12 II 9 10 J 5 6 7 8 C E © C-DIS-I ©S-SW-I \ OUTPUT DATA BUS / J 3 DB-25-F / \ .1 .2 .4 .8 1 2 4 8 10 20 40 80 100 + 51 52 53 54 ERROR +5 VDC COM CELSIUS OUTPUT DATA AND STROBES 13) P-BUS-I 18 17 16 19 15 3 2 14 7 13 8 6 5 I 4 9 10 II 12 21 20 3A4 DISPLAY MOTHERBOARD 1063 - 1003 DISPLAY DATA BUS 3A4AI NUMERIC DISPLAY TA 1063-301 3A4A2 NUMERIC DISPLAY TD 1063-301 3A4A3 NUMERIC DISPLAY TMAX 1063-301 TYPICAL CONNECTIONS 8I0 97L43KEJFD C2HBI A .1 .2.4.8 I 2 4 8 I0 204080p+£*i>2 O I— —I (O O 3A4A4 cnm 8 NUMERIC DISPLAY TMIN SCHEMATIC DIAGRAM DISPLAY UNITThe Receive Logic PC assembly is the logical controller for the Display Unit. It receives the serial data stream from the transmitter, converts the data to a parallel format, translates the binary data to BCD for display, and performs various arithmetic functions on the data. These functions include 5-minute data averaging, error checking, suppression of leading zeros, and Celsius-to-Fahrenheit display conversion when requested. Output of the assembly is a BCD data bus for distribution to the display modules, a BCD data bus buffered for external use, and strobe lines for separating data words from the multiplexed data output. Tl is a 900 to 600 ohm line transformer which converts the balanced input signal to a single-ended input to the input amplifier. Surge limiters SLl and SL2 provide protection against high voltage transients which may be received on the incoming phone line. (7) C-AMP-1 U4 is a standard data line receiver IC which converts the bipolar input signal to TTL logic levels. VRl, a 6.8 volt zener diode, provides additional protection against input transients. Ul, a Motorola Type 68701 microprocessor, is identical to those used in the transmitter. The processors are socket mounted and are interchangeable. Ul contains a 128 byte RAM and an on-board 2048 byte ROM. All of the necessary program for transmit, monitor, and display are written into each processor. Ground connections on pins 13 and/or 14 serve as control inputs, determining which of the three internal programs is to be used. In the Receive Logic application, during the start-up sequence, the processor scans the inputs on pins 13 and 14 and sees a 1 on 13 and a 0 on 14, and automatically goes to the display section of the resident program. The 68701 is erasable and may be re-programmed.Ul contains an internal clock, controlled by 2.458 MHz crystal Yl. Output data is in the form of a parallel BCD bus of 15 bits (3 1/2 digits and sign), multiplexed to read Ta, Td, Tmax, and Tmin. Four data strobe signals, S1-S4, are timed for separating the data for external storage. An Error Flag bit is brought out for the display unit Error light. This bit indicates presence of various faults which may be detected in the transmitter; it also indicates errors which may have occurred in the data transmission process, or data values which fall outside arbitrary limits in the program. Certain functions of the program are controlled by grounding appropriate input lines to the processor. This includes the Display Test, in which the processor is programmed to write -188.8 to all displays, the Fahrenheit mode, in which the display data is converted to degrees Fahrenheit, and the Average/Instantaneous mode selection. When the Instantaneous mode is used (for test purposes only), the processor uses the "monitor" portion of the program. Complete details of the operating software and operation of the microprocessor are given in an appendix to this manual. (T) C-PWR-1 A portion of the RAM which contains data which must be preserved through power failures is powered by way of + 5 volts DC on Ul pin 21. Main 5 volt power to Ul comes in through pin 7. In the event of loss of system power, Ul-21 receives standby power from a 4.8 volt battery Bl, protecting the RAM data for as long as 11 hours. Bl is maintained under continuous trickle charge of about 4 milliamperes by the 9 volt supply through CR3 and R17. When the Error bit output is high, astable multivibrator U2B is enabled, generating a 2-PPS square wave. The square wave, through inverter U6H, drives the Error lamp on the display unit front panel.A bank of inverters with high drive capacity brings out the BCD data bus, all strobes and the error bit to a connector on the display unit rear panel for external use. U2B is a 100 PPS free-running multivibrator driving one-shot U3. The active time of U3 is variable, controlled by the value of the Display Dimmer control on the display unit front panel. U3 output is a train of positive pulses at 100 PPS with a positive pulse duration variable from 0 to 7 milliseconds. This signal is used as the blanking input to the Numeric Display modules. When the dimmer control is in the "dim" position, U3 output is zero with very narrow positive pulses and the displays are not visibly lighted. When the control is near the "bright" end, U3 output is high about 70 per cent of the time, and the displays are brightly illuminated. When power fails, critical data is protected by the standby battery. This, however, does not guarantee that the processor goes down in an orderly manner, and there is the possibility that the RAM data may be erased in the last few cycles of operation. To guarantee an orderly shut down, the processor must be placed in the Reset condition before power goes off. Ql and Q2 are a level-sensitive one-shot which monitors the +5 volt DC supply line. Sensed by VR3, if the nominal + 5 volt level drops below + 4 volts as power begins to fail, the one-shot holds the Reset input, Ul pin 6, at zero for a few milliseconds. The Reset condition does not affect the protected data. The Reset line is also momentarily brought down each time the Display Test switch on the front panel is depressed, as a means of re-starting the processor in the event of spontaneous failure of the processor.SL2 @ C-PWR-I Rl 7 CR3 ^—KF SCHEMATIC RECEIVE LOGIC MULTIPLEX DATA OUTPUT- 24 PIN DIPThe Display Power Supply furnishes regulated 6.8 volts DC with an output capacity of 3 amperes. This power is used only by the Numeric Display modules. An auxiliary output, 9 volts DC unregulated, is used as a trickle-charging source to the standby battery in the Receive Logic card. © X-LIM-1 SLl and SL2 are MOV surge limiters, providing protection against input line surges and transients. Maximum amplitude of transients is limited to about 200 volts. C3 filters out high-frequency line noise. (7) C-PWR-l Transformer Tl, rectifier bridge CR1-CR4, and Cl comprise a 9 volt DC power supply. © C-REG-1 Reference diode VRl establishes a 7.5 volt DC level at the base of high-gain power transistor Ql. The output of Ql, regulated by its low output impedance, is at a level of 6.8 volts DC. C2 provides additional filtering. © X-LIM-2 VR2, a power zener diode, acts as an output voltage limiter in the event of failure of Ql, holding the output voltage below about 8.0 volts. 2-45 (2-46 blank)+ 9V o OUT 5 I O- 115 VOLTS INPUT 3 O- COMMON O-10 ©C-PWR-I Tl SIGNAL 241-7-10 SLl , S07KI50 C3 .1/600 / SL2 S07KI50 Qx-lim-i CR4 CR3 IN5400 TYP Cl -4000/I5V (4) X-LIM-2 R I 220 a Ql 2N377I VRl IN4737 (7.5 V) R 2 4700 C2 10/35 £ VR2 IN5344 (8.2V) R 3 1000 6.8 V 3AMPS % OUT SCHEMATIC DISPLAY POWER SUPPLYNUMERIC DISPLAY KEYED TEXT The Numeric Display module is a plug-in printed circuit assembly which decodes a 13-bit parallel BCD data bus and presents a 3 1/2 digit decimal numeric display. In addition to decoding, driving and displaying the data value, the card includes +/- indication, data storage, and blanking. 0 C-DIS-1 The digital display elements are Type FFD-41 incandescent 7-segment units. They are plug-in replaceable. Bar segments are physically arranged as shown by the segment plan. Each segment is driven by an individual logic line at a level of 0 or +6 volts DC, from its decoder-driver output. U4 is located at the right-hand side of the array, indicating tenths of a degree. 0 C-DIS-2 U3 operates identically to U4, described above, and it indicates units. The decimal point input, pin 8, is permanently connected to +6 volts, fixing the decimal point permanently at the right side of the units display. 0 C-DIS-3 U2 operates identically to U4, indicating tens. 0 C-DIS-4 On U5, the hundreds digit, only the segments necessary for displaying a "1" and a are connected. When elements b and c are energized, a "1" is displayed, representing 100, and when element g is lit, the center bar is lit, indicating the negative sign. In its application in the H083, data values never exceed 199, so that the other conditions of the hundreds digit need not be activated. 0 I-DEC-1 A Motorola 14511 CMOS latch/decoder/driver IC is used to drive the displays. U9 BCD inputs, pins 7, 1, 2, and 6 are connected to the data bus tenths data lines. Pin 5 is the latch enable, or strobe input.When the strobe line, normally at high level, goes to 0 momentarily and is returned to 1, the values on the data lines at the time of the transition trailing edge are stored in the latches of the 14511. The latch outputs are internally connected to 7-bar encoders which drive the appropriate outputs to the display. A blanking input, pin 4, is used to enable the output power to the display. This input is pulse-width modulated to vary the average on/off time of the power, resulting in variable average display dimming. (?) I-DEC-2 U8 functions identically to U9, using the "units" BCD data lines and driving the units display. The strobe line is common to all decoders. U7 functions identically to U9, using the "tens" data and driving the tens display. U6 is connected to respond to the inverse of the 100 data line. When 100 is to be displayed, the input line is 0. This is decoded as 8 input to 14 511. Since only segments b and c are used, the digit "8" looks like a "1". When the input line is up, indicating that the 100 digit is not to be displayed, the input is decoded as value 12, since input pins 2 and 6 are up, representing 8 + 4. The value 12 is decoded as an illegal state by the 14511, and the output is automatically blanked, and the hundreds display is blanked out. (?) I-DEC-5 U5 is connected only to segment g of the hundreds display. When the sign input is 0, U5 decodes a 0 value, and bar g is not energized. When the sign bit is 1, U5 decodes a 2 value which lights the center bar, producing the effect of negative (-) sign on the hundreds display. The negative sign and the 1 display can exist at the same time, indicating -1, representing -100.BCD DATA IN +/- ♦6V GND 100 BLKG STR 80 40 20 10 8 4 2 2 1 A C B H D F J E K 3 4 L 7 9 10 8 © l-DEC-5 5 1 2 6 7 8 4 U5 14511 16 3 14 J +6V SEGMENT PLAN UI-U4 © I "DEC-4 n 5 ; > 1 7 8 4 U6 14511 1 1 12 6 16 3 +6V 3 10 13 Ul FFD-41 I 4 9 II 12 © C-DIS-4 100's © l-DEC-3 © 5 6 2 17, 8 U7 14511 l< 13 12 II 10 9 1514 +6V 14 13 10 6 5 2 3 U2 FFD-41 I 4 9 1112 nm— C-DIS-3 10's © l-DEC-2 © 5 6 2 I 7 4 8 U8 14511 16 13 12 II 10 9 15 I43 + 6V + 6V Rl 100 14 13 10 6 5 2 3 U3 FFD-41 q I 4 9 II 12 DECIMAL POINT C-DIS-2 © Is I-DEC-1 5 6 2 I 74 8 U9 14511 16 13 12 II 10 9 15 I43 +6V 14 1310 6 5 2 3 U4 FFD-41 I 4 9 II 12 C-DIS- .1 s ASSEMBLY P/N 1063-301 SCHEMATIC DIAGRAM NUMERIC DISPLAY 2-5l/( 2-52BLAN K)ASPIRATOR BOTTOM DECK * _i I I CM OJ Q- Q- 17—10150— I (390) -P2-P - 1 -P2-R - 2 3 -P2-A - 4 -P2-G - 5 -P2-F - 6 -P2-N - 7 -P2-C - 8 9 -P2-D - 10 -P2-H - II -P2-J - 12 - P2-B - 13 -P2-E - 14 -P2-M - 15 PI JI IAI DEW POINT SENSOR ASSY 60" CABLE PI-4 PI-14 PI -13 PI-8 PI-10 PI-6 PI-5 PI-I I PI-12 b:-i Bl—2 PI-15 PI-7 PI-1 PI-2 _BK_ YL ORN SHLDS SHLDS WH GN BK WH BR BK BK NOTES DENOTES TWISTED, SHIELDED, PAIR ALL CONDUCTORS ARE AWG 22 P2 MS 3II6-I6-26P PLUGS INTO TRANSMITTER UNIT WIRING DIAGRAM ASPIRATORW/RD 2 A3 5 VOLT POWER SUPPLY 2J2-5 R 2X3-11 20R 2X3-7 20BK 2X1 ELCO 6007-006-940-012 2 AI TRANSMIT LOGIC 12 3 4 5 7 8 9 10 II 12 13 14 15 16 17 18 19 20 21 22 K cm _ io _ ro ■ i i i i i CM CM CM CM CM CM -i-3 x u) h < CM CM CM CM CM O > u> - O >- CD 8 o CVJ in <0 1 Q. 1 -cr N > \ V) Xn oi >X ■Pl. —UJ S2 FAHRENHEIT 7 7" cr o ^ i* 8 7 ji SIGNAL INPUT S5 MODE (INST/AVG) RIBBON CABLE J3 DATA OUT 17 16 15 14 1920 2 DB-25-F 22 10 II 8 24 9 23 3 4 5 18 7 1 2 25 TTI 1 1 1 ri i n 1111 ii i m m .1 .2 4 .8 I 2 4 8 10 20 40 80100+51 52 53 54 E 5V C C R 0 E R ML S. V BCD DATA OUTPUT R I o o|—I ' 2 BK O_O-n S3 RESET Ho i BK 1 GOLD SILVER S4 DISPLAY TEST DSI ERROR TTi i* » i »i t I *_L_L' ill i i* xxxxxxxxxxxxxxxxxxxxx 000000000000000000000 1 2 3 4 5 6 7 8 9 10 II 12 13 14 15 16 17 18 19 20 21 A4 DISPLAY MOTHERBOARD < o -RI-2 -S5-4 W/BRN/YEL W/GN/VIO W/GN W/R WH -A4—12 - W/BLU W/ORN W/VIO W/GN/VIO W/GY VIO — A4-9 — A4-I0 — A4-II A4-I2 A4-5 A4-1 A4-6 -A4-8 A4-I3 A4-7 A4-I4 -A4-2 W/B/R A4-3 A4-I5 A4-I9 A4-I6 A4-I7 A4-I8 X2-6 — A4-7 -1ZL- GN -A4-3 -MSSL BLU _A4_,q W/BLU/OR ORN BN W/BK -X2-6 —20R_ -c 20 B -20B -20R -U-ys-p -.29PK — 20BK Xl-F J2-2 A4-2I X3-8 A4-20 XI -B JI A4-4 DSI + Rl — I S4-I S2-2 X3-5 JI-3 20 BK BK/W _ A4-4 W/YEL ■BK/YEL BK/ORN BK/ORN VIO/WH -Y3-5 -BK/VIO BK/R S2-I S4-2 BK/GRY VIO 6007-044-941-012 \_ NOTE: ALL WIRES 22 AWG UNLESS OTHERWISE NOTED. WIRING DIAGRAM DISPLAY UNIT 3-5/(3-6 BLANK)1. DEW-POINT SENSOR ASSEMBLY (1A1) REMOVAL Turn off the Transmitter Unit main power. Remove the Aspirator assembly from its shell by removing the captive screw on the side (Support Volume Figure 4-1). With the screw removed, the entire assembly slides downward out of the shell. The internal components of the sensor assembly are delicate and must be handled with care. The unit can be permanently damaged by excessive mechanical shocks. Carefully disconnect the 15-pin plug, Pi, on the sensor board, 1A1. Remove the 6 screws holding 1A1 to the deck plate. Lift the assembly and remove it to the side. REPLACEMENT Slide the new sensor assembly into the deck plate and replace the 6 mounting screws. Re-connect Pi. Note that the foam packing between the underside of the card and the heat sink should not be removed from the assembly. 2. ASPIRATOR FAN (1B1) REMOVAL Follow above instructions for removal of sensor assembly from Aspirator shell. The fan is connected electrically by two wires, black and white. Unsolder the wires and remove the three screws holding the fan to the sensor assembly.Install the blade guard on the new fan and mount the fan in place. Re-solder the connections. Slide the Aspirator asembly into its shell and replace the captive screw. I. 15-PIN PLUG (1P1) REMOVAL Follow above instructions for removing sensor assembly from Aspirator shell. Disconnect plug from 1A1 and cut all of the wires on the plug, leaving the cable as long as possible. REPLACEMENT Using the Aspirator Unit Wiring Diagram (p. 46) as a guide, trim, dress and solder all wires to the plug. Re-connect plug onto 1A1 and slide the sensor assembly back into the Aspirator shell. Turn off Transmitter Unit main power. Disconnect the Aspirator Unit cable from the Transmitter. Cut the conductorse as close to the connector as possible. Using the Aspirator Unit Wiring Diagram (p. 46) as a guide, dress, trim, and re-solder all wires onto the plug. Re-connect the cable to the Transmitter.ITEM REF DESIGN. PART NAME 8 DESCRIPTION 1 IAI DEW POINT SENSOR ASSY. 2 IBI ASPIRATOR FAN, 115 VAC 3 IPI PLUG, 15-PIN "D" 4 IP2 PLUG, 26-PIN, MS3II6 AMBIENT SENSOR PARTS LOCATOR ASPIRATOR UNITTRANSMITTER UNIT GENERAL Except where noted otherwise, all of the following repair/replacement tasks can be performed with the transmitter chassis remaining in its weatherproof cabinet. In most cases, input power may remain connected through TBl; however, for certain tasks, power input should be turned off externally or removed from TBl. 1. TRANSMIT LOGIC PC ASSY. (2A1) REMOVAL Turn off Transmitter main power. Grasp the ejector ears at the top corners of the card and turn them outward, forcing the card out of its socket. Slide the card out on its guides. REPLACEMENT Slip the new card in the guides and allow it to position easily at the socket. Depress the ejector ears toward the socket until the card is firmly seated. Check calibration and adjustments in accordance with the procedure given in the Support Volume, Section 4-4. 2, CALIBRATOR ASSY. (2A2) REMOVAL Turn off the power input at its source. Remove the four corner mounting screws on the control panel which houses the Calibrator. Disconnect 2X1 to the +5 volt supply to permit the control panel to be turned over. Using a No. 4 Allen wrench, remove the calibrator switch knob. Turn the control panel over, exposing the Calibrator PC assembly. Unsolder the 8 wires to the calibrator. Turn the control panel to its normal attitude and remove the mounting nut from the calibrator switch. The entire assembly may now be removed. REPLACEMENT Install the new calibrator assembly under the control panel by way of the switch mounting nut. Align the assembly square and tighten the nut. Using the Transmitter wiring diagram as a guide, re-solder the 8 leads to the assembly.Re-connect 2X1 to the + 5 volt power supply card and install the control panel by its four screws. Test operation of the Calibrator and the rest of the transmitter in accordance with the procedure given by Support Volume, Section 4-4. 3. -1-5 VOLT POWER SUPPLY (2A3 ) REMOVAL With transmitter power off, remove the four corner mounting screws on the + 5 volt power supply card. Lift the assembly out of the chassis, disconnecting 2X1. REPLACEMENT Place the assembly on the four mounting standoffs and replace the four mounting screws. Re- connect 2X1. Test the transmitter performance according to the Support Volume, Section 5-9.3. 4. AUXILIARY POWER SUPPLY (2A4) REMOVAL With transmitter power off, remove 2X2, the Auxiliary Power Supply connector. Remove the four mounting screws which fasten the assembly to the chassis. Lift the assembly straight up and out. REPLACEMENT Lower the assembly into its mounting position and replace the four mounting screws. Re-connect 2X2 and its locking hardware. Check transmitter performance in accordance with Support Volume, Section 5-9.3. 5. ASPIRATOR CONNECTOR (2Jl) REMOVAL With transmitter power off, loosen the jam nut on the outside of the transmitter cabinet. Pull 2J1 inside the cabinet and unsolder all 15 active connections. Remove the connector.Trim, dress, and tin all of the wire ends. Using the Transmitter wiring diagram as a guide, re-solder all connections carefully. Re-install the connector, and tighten the jam nut. Check operation of the transmitter per the Support Volume, Section 5-9.3 6. LINE FILTER (2Z1). TBl. TB2 REMOVAL To remove these components, the transmitter chassis must be removed from its cabinet. This is done by loosening and removing the jam nut on 2J1, disconnecting the external signal and power wires from TBl and TB2, and removing the four 10-32 screws at the extreme corners of the chassis plate. With the screws out, the chassis may be lifted straight up out of the cabinet. To remove 2Z1, unsolder the five connections and remove the two screws which fasten 2Z1 to the chassis. To remove TBl or TB2, disconnect the wires by removing the terminal screws, and remove the block by way of two chassis mounting screws. REPLACEMENT Fasten the replacement item to the chassis and re-solder the connections to 2Z1, or re-install the lugs on TBl or TB2. Lower the chassis back into the cabinet, refasten the four chassis screws, and re-install 2J1 jam nut. Test operation of the transmitter.7 7. POWER SWITCH (2S1). TEST SWITCH (2S2). FUSE (2XF1) REMOVAL Disconnect the AC power from the transmitter or turn it off at the source. Remove the four screws on the top of the control panel and disconnect 2X1, the 5 volt power supply card connector. Turn the control panel over, unsolder and remove the component. REPLACEMENT Install the component, re-solder leads, using the transmitter wiring diagram as a guide, and turn the control panel over to its normal attitude. Re-install the four control panel mounting screws. Re-connect 2X1 to the 5 volt power supply. Test operation of the transmitter per the Support Volume, Section 5-9.3Disconnect transmitter input power or turn it off at the source. Disconnect the connector to be replaced, cut off all wires as close as possible to the old connector. REPLACEMENT Trim, dress and tin all wires. Re-solder to the new connector using the transmitter wiring diagram as a guide. In the case of receptacle 2X3, the contacts are soldered to the wires, then poked into the connector shell and will lock into position. Connections to 2X1 and 2X2 are soldered in place. Re-install the receptacle. Apply power and test the transmitter per the Support Volume, Section 5-9.3.ITEM REF. DESIG. PART NAME 8 DESCRIPTION 1 N/A HOUSING 2 N/A CHASSIS SUBASSEMBLY 3 2AI TRANSMIT LOGIC PC. 4 2A2 CALIBRATOR ASSEMBLY 5 2A3 POWER SUPPLY, +5 VOLTS 6 2A4 AUXILIARY POWER SUPPLY 7 2 JI RECEPTACLE, MS3II4E 8 2TB1 TERM. BLOCK, AC INPUT 9 2TB2 TERM. BLOCK, SIGNAL OUT 10 2ZI LINE FILTER II 2SI SWITCH, DPDT, MAIN POWER 12 2S2 SWITCH, DPDT, MOM, HEAT/COOL 13 X/FI FUSE, 2 AMPS, 250V 14 2X1 RECEPTACLE, 6-PIN 15 2X2 RECEPTACLE, 15-PIN "D" 16 2X3 RECEPTACLE, 22-PIN PARTS LOCATOR TRANSMITTERDISPLAY UNIT Most of the repair tasks listed below may be made while the Display Unit is in place in its cabinet installation. Access to the chassis components and behind the panels is made by unlatching the chassis retainers at the upper corners of the front panel. The chassis slides out, and may be tilted downward. Removal of the top cover screws allows the cover to be removed, exposing all internal components. If the unit is to be removed from the rack, disconnect the input signal cable, Pi, and pull out the AC power line connector, and slide the unit out to its limits. Depressing the buttons on the slide assembly disengages the slide stops and the unit may be pulled out of the rack. 1. RECEIVE LOGIC PC ASSY. (3A1) REMOVAL Turn off power. Disconnect the BCD output cable which plugs into the top of the PC assembly, by pulling it straight up from the DIP socket. Using the card ejection ears, slide the card in its guides out of its socket and slide it out. REPLACEMENT Slide the card into place in its guides, and seat it firmly in its socket by depressing the ejection ears. Carefully plug the BCD output ribbon cable into its DIP socket on the replacement card. Check operation of the display unit per the Support Volume, Section 5-9.3. 2. +5 VOLT DC POWER SUPPLY (3A2) REMOVAL Turn off power. Remove the four mounting screws which secure the power supply card to the chassis. Lift the supply straight up, disconnecting receptacle 3X2. REPLACEMENT Install the new supply by way of its four mounting screws. Re-connect 3X2. Test the display unit per the Support Volume, Section 5-9.3.Turn off power. Remove the four mounting screws which secure the supply to the chassis. Lift the supply straight up, disconnecting receptacle 3X3. REPLACEMENT Install the new supply by way of its four mounting screws. Re-connect 3X3. Test the display unit per the Support Volume, Section 5-9.3. 4. NUMERIC DISPLAYS (3A4A1 - 3A4A4) REMOVAL Remove the two 4-40 nuts and nylon washers which connect the display module to the front panel bezel. Pull the bezel away from the front panel, taking care not to lose the two black plastic spacers on the bezel screws. Push th display module back slightly, away from the front panel, and lift the module out of its socket. REPLACEMENT Plug the replacement module into its socket. Insert the bezel from the front, through the panel, guiding the two screws through the matching holes in the module. The black spacers must be between the panel and the module. Install the nylon flat washers and the mounting nuts loosely. Turn the two spacers so that their feet point outward, clamping on the sides of the panel cutout. Tighten the nuts only enough to secure the assembly. Test operation of the display unit per the Support Volume, Section 5-9.3. 5. DISPLAY MOTHERBOARD (3A4) REMOVAL Turn power off. Remove the four numeric display modules. Unsolder the 21 wires which connect the assembly to the main wiring harness. Remove the six screws which secure 3A4 to the chassis floor. Lift the assembly straight up and out.Trim, dress and tin all of the 21 connection wires. Re-solder, using the display wiring diagram as a guide. Re-install the motherboard by way of its six mounting screws. Re-install the four numeric display modules. Test operation of the display unit per the Suppor Volume, Section 5-9.3. 6. FRONT PANEL COMPONENTS (3S2-3S4. 3R1. 3DS1) REMOVAL Turn power off. Unsolder the component and remove by carefully loosening the mounting nut on the panel. REPLACEMENT Re-install the component by way of its mounting nut. Trim, dress, and tin the leads and re-solder. Test operation of the display unit per the Support Volume, Section 5-9.3. 7. REAR PANEL COMPONENTS (3S1. 3S5. 3Jl. 3J2. 3XF1. 3J3) REMOVAL Turn power off. Unsolder leads. Remove component by way of its mounting nut or screws. REPLACEMENT Re-install the component by way of its mounting hardware. Trim, dress and tin leads and re-solder, using the display unit wiring diagram as a guide. Test operation of the display unit per the Support Volume, Section 5-9.3.-15/(4-16 BLANK) ITEM FART NAME a DESCRIPTION 1 3AI PC ASSY, RECEIVE LOGIC 2 3A2 POWER SUPPLY ^5 VOLTS 3 3A3 DISPLAY POWER SUPPLY*6V 4 3A4 PC,DISPLAY MOTHERBOARD 5 3A4AI NUMERIC diSplAV ASSy. ta 6 3A4A2 Num£r|£ DISPLAY ASSY, TD 7 3A4A3 NUMERIC DISPLAY ASSY. TMAX 8 3A4A4 NUMERIC DISPLAY ASSY. TMIN 9 3JI RECEPTACLE 3-PIN,SIGNAL IN -JO- 3J2 RECEPTACLE/FILTER. AC INPUT II 3J3 RECEPTACLE 25-PINnD': DATAOUT 12 1YT..... R^CEPtAtL^, p£, 44-PIN 13 3X2 RECEPTACLE. PC. 6-PIN 14 3X3 RECEPTACLE. PC.10-PIN 15 3SI SWITCH.DPDT.MAIN POWER 16 3S2 Switch, dpst. Fahrenheit 17 3S3 Switch, dpst, reset 18 3S4 Switch,dpst, display test 19 3S5 SWITCH.DPDT. TEST 2 3X/FI FUSE. 2 AMP. 250 VOLTS 21 3&SI INDICATOR. LED.ERROR 22 3RI POTENTIOMETER, 25KXHMMER PARTS LOCATOR DISPLAY UNIT LIST OF REPLACEMENT PARTS IN SPARE PARTS CHEST ******* MODEL HO83 HYGROTHERMOMETER ******** ITEM REF. DESCRIPTION OF PART MANUFACTURER'S PART NO. QUANTITY IN DESIG. SPARE PARTS CHEST UNIT 1 - ASPIRATOR: 1. 1A1 Dew Point Sensor Assy. TSL 1063-104 1 2. 1B1 Aspirator Fan, 115 Volts AC TSL 1063-108 2 3. 1P1, 2X2 Plug, 15-pin Female, "D" Amphenol 17-10150-1(39 0) 2 4. 1P2 Plug, 26-pin Male MS 3116F-16-26P 2 UNIT 2 - TRANSMITTER: 5. 2A1 PC Assy, Transmit Logic TSL 1063-204 1 6. 2A2 Calibrator Assy. TSL 1063-205 1 7. 2A3, 3A2 Power Supply, +5 Volts DC TSL 1063-202 1 8. 2A4 Auxiliary Power Supply TSL 1063-203 1 9. 2 Jl Receptacle, 26-pin, Female MS3114E-16-26S 2 10. 2S1 Switch, Toggle, DPDT MS 3950-35059-22 2 2X2, 1P1 Plug, 15-pin, Female, "D" Amphenol 17-10150-1(39 0) Ref. Item 3 11. 2X1, 3X2 Socket, Card Edge, 6-pin ELCO 6007-006-940-012 2 ,12. 2X3 Socket, Card Edge, 22-pin ELCO 6007-022-940-012 2 13. 2S2 Switch, SPDT,Momentary MS 3950-35058-27 2 14. 2TB1,2TB2 Terminal Block, 3 Position Beau 72103 2 15. 2XF1, 3XF1 Fuse Mount Bussman HKP 2 16. 2F1, 3F1 Fuse, 2 Amp, 250 Volt Littlefuse 312002 10 17. 2 Zl Line Filter, 115 Volts AC Sprague 2JXS102A 2 UNIT 3 - DISPLAY: 18. 3A1 PC Assy, Receive Logic TSL 1063-303 1 3A2, 2A3 Power Supply, + 5 Volts DC TSL 1063-202 Ref. Item 9 19. 3A3 Display Power Supply, +6 Volts DC TSL 1063-302 1 20. 3A4A1-3A4A4 PC Assy, Numeric Display TSL 1063-301 1 3X2,2X1 Socket, Card Edge, 6-pin ELCO 6007-006-940-012 2 21. 3X3 Socket, Card Edge, 10-pin ELCO 6007-010-940-012 2 22. 3X1 Socket, Card Edge, 44-pin ELCO 6007-044-940-012 2 23. 3J1 Receptacle, 3-pin, Male Amphenol 91-T-3263-9 2 24. 3J2 Filter/Receptacle, 115 Volts AC Corcom 3EF1 2 25. 3J3 DIP-to-"D" Jumper TSL 1063-304 1 26. 3S1, 3S5 Switch, DPDT, Toggle C-H 8373-K127C 2 27. 3S2-3S4 Switch, PB, DPST, NO Grayhill 35-1 2 3XF1, 2XF1 Fuse Mount Bussman HKP Ref. Item 17 3F1, 2F1 Fuse, 2 Amps, 250 volt Littlefuse 312002 Ref. Item 18 28. 3DS1 LED Indicator Leecraft L45RN-R2-2111 2 29 . N/A Mating Input Signal Plug Amphenol 91-T-3260-1 2 30. 3R1 Potentiometer, Single-turn, 25K RV6NAYSA253A 2 31. Touch-Up Paint 1 Bottle Black, 1 Bottle White 4-17 (4-18 Blank)IC DATA SHEET INDEX PART NO. DESCRIPTION MANUFACTURER DATA SHEET PAGE # SG 323K +5V REGULATOR SILICON GENERAL A-2 MC78M12CG +12V REGULATOR MOTOROLA A-3 uA 79M12AHC -12V REGULATOR FAIRCHILD A-4 MC68701L MICROPROCESSOR w/EPROM MOTOROLA A-5 IC7109CPL A-D CONVERTER INTERSIL A-6 MC15 5 8 u nriAT OO-SMp MOTOROLA A-7 SN7404N HEX INVERTER TEXAS INSTRUMENTS A-8 MC140I6B ANALOG GATE MOTOROLA A-9 MC14 88P LINE DRIVER MOTOROLA A-10 NE555P TIMER TEXAS INSTRUMENTS A-11 MC78M05CG +5V REGULATOR MOTOROLA A-12 SG320T-5.2 -5V REGULATOR SILICON GENERAL A-13 MC1489N LINE RECEIVER MOTOROLA A-14 SN7474N DUAL FLIP-FLOP TEXAS INSTRUMENTS A-15 TIL-308 DECIMAL DISPLAY TEXAS INSTRUMENTS A-16 FFD-41 DIGITAL DISPLAY IEE A-17 MC14511BCP LATCH/DECODER/ DRIVER MOTOROLA A-18 SN74LS629 N DUAL MULTIVIBRATOR TEXAS INSTRUMENTS A-19 SN74121N ONE-SHOT MULTIVIBRATOR TEXAS INSTRUMENTS A-20 SN74LS240N OCTAL BUFFER/ INVERTER TEXAS INSTRUMENTS A-21 A-l3 Amp, 5 Volt Positive Regulator SG123 ISG223 / SG323 Description The SG123 is a three terminal, three amp, five volt regulator similar to the LM123 but with a special low voltage zener instead of the band gap reference. The SG123 has superior load regulation, lower input-output differential minimums, lower quiescent current, and better temperature coefficient. The circuit is specified identically to the LM123 and is pin for pin compatible with that device. The SGI23 uses special processing techniques to achieve reliable operation at high temperatures and high current levels for extended periods of time. The SGI23 has been designed for ease of operation as well as performance. It is completely internally phase compensated, and requires no external capacitors unless used with long lead lengths or high speed transients. The device is protected by thermal shutdown, standard current limiting, and an instantaneous power limiting circuit sensitive to high input voltages. In addition, the power transistor is an upgrade of previous three terminal designs and is unusually rugged. Operation is guaranteed over the junction temperature range of — 55°C to + 150°C. The SG223 is a similar device guaranteed to operate from — 25°C to + 150°C. The SG323 is guaranteed over the junction temperature range of 0°C to + 125°C. Features • 3A Output Currents • Full Internal Protection • 7.0 V Minimum Input Voltage, Typical • Zener Reference for Top Performance SCHEMATIC CONNECTION DIAGRAM TOP VIEW K-Packige TO-3 Absolute Maximum Ratings Input Voltage Power Dissipation Operating Junction Temperature Range SGI 23 SG223 SG323 Storage Temperature Range Lead Temperature (Soldering, 10 sec) 20V Internally Limited — 55°C to +150°C — 25°C to + 150°C 0°C to +125°C — 65°C to + 150°C 300°C Electrical Characteristics (Note 1) 1 PARAMETER CONDITIONS SG123/SG223 SG323 UNITS MIN TYP MAX MIN TYP MAX Output Voltage T = 25°C V = 7.5V, 1 = 0 4.7 5 5.3 4.8 5 5.2 V Output Voltage 7.5V < V < 15V 0 < 1 < 3A, P < 30W 4.6 5.4 4.75 5.25 V Line Regulation (Note 2) T = 25°C 7.5V < V < 15V 5 25 5 25 mV Load Regulation (Note 2) T = 25°C, V = 7.5V 0 < 1 < 3A 25 100 25 100 mV Quiescent Current 7.5V < V < 15V, 0 < 1 < 3A 12 20 12 20 mA Short Circuit Current Limit T = 25°C V = 15V V = 7.5V 3 4 5.0 5.5 3 4 5.0 5.5 A A Long Term Stability 35 35 mV Thermal Resistance Junction to Case (Note 3) 2 2 °C/W Note 1: Unless otherwise noted, specifications apply for -55CC < T < + lSO^C for the SG123, - 25°C < T < -4 150'C for the SG223, and 0° < T < + 125°C for the SG323. Specifications apply for P < 30W. Note 2: Load and line regulation are specified with high speed tests in order to separate their effects from temperature coefficient. Pulse testing is required with a pulse width < 1 ms and a duty cycle < 5%. Note 3: The junction to ambient thermal resistance of the TO-3 package is about 35°C'W.<8> MOTOROLA MC7SM00C series MC78M00C SERIES THREE-TERMINAL POSITIVE VOLTAGE REGULATORS The MC78M00 Series positive voltage regulators are identical to the popular MC7800C Series devices, except that they are specified for only one-third the output current. Like the MC7800C devices, the MC78M00C three-terminal regulators are intended for local, on-card voltage regulation. Internal current limiting, thermal shutdown circuitry and safe-area compensation for the internal pass transistor combine to make these devices remarkably rugged under most operating conditions. Maximum output current, with adequate heatsinking is 500 mA. • No External Components Required • Internal Thermal Overload Protection • Internal Shf'rt-Circuit Current Limiting • Output Transistor Safe Area Compensation • Packaged in the Plastic Case 221A and Case 79 (TQ-220 and Hermetic T0-39) REPRESENTATIVE SCHEMATIC DIAGRAM THREE-TERMINAL POSITIVE FIXED VOLTAGE REGULATORS Pin 1. Input 2, Output 3. Ground Bottom V iew G SUFFIX METAL PACKAGE CASE 79 TO 39 (Case connected to Pin 3) T SUFFIX PLASTIC PACKAGE CASE 221 A (TO 220 Type) (Heatsink surface connected to Pin 2) STANDARD APPLICATION A common ground is required between the input and the output voltages The input volt age must remain typically 2 0 V above the output voltage even during the low point on the input ripple voltage ‘ * C,n is required if regulator is located an appreciable distance from power supply filter •*=Co improves stability and transient response. ORDERING INFORMATION DEVICE TEMPERATURE RANGE PACKAGE MC78MXXCG T j : 0° C to ♦ 150° C Metal Can MC78MXXCT Tj 0° C to ♦ 150° C Plastic Power XX indicates nominal voltage TYPE NO./VOLTAGE MC78M05C 5.0 Volts MC78M06C 6 0 Volts MC78M08C 8 0 Volts MC78M12C 12 Volts MC78M15C 15 Volts MC78M18C 18 Volts MC78M20C 20 Volts MC78M24C 24 VoltsFAIRCHILD A Schlumberger Company Description The jiA79MOO series of 3-Terminal Medium Current Negative Voltage Regulators are constructed using the Fairchild Planar epitaxial process. These regulators employ internal current limiting, thermal shutdown and safe-area compensation making them essentially indestructible. If adequate heat sinking is provided, they can deliver up to 500 mA output current. They are intended as fixed voltage regulators in a wide range of applications including local (on-card) regulation for elimination of noise and distribution problems associated with single point regulation. In addition to use as fixed voltage regulators, these devices can be used with external components to obtain adjustable output voltages and currents. ■ OUTPUT CURRENT IN EXCESS OF 0.5 A ■ INTERNAL THERMAL-OVERLOAD PROTECTION ■ INTERNAL SHORT CIRCUIT CURRENT LIMITING ■ OUTPUT TRANSISTOR SAFE-AREA COMPENSATION ■ AVAILABLE IN JEDEC T0-220 AND TO-39 PACKAGES ■ OUTPUT VOLTAGES OF -5 V, -8 V, -12 V, and -15 V Absolute Maximum Ratings Input Voltage —5 V through —15 V -24 V Internal Power Dissipation Storage Temperature Range TO-39 T0-220 Operating Junction Temperature Range TO-39 Military UA79MOO) Commercial 0*A79MOOC) T0-220 Commercial 0*A79MOOC) Pin Temperature (Soldering, 60 s) TO-39 (Soldering, 10 s) T0-220 juA79M00 Series 3-Terminal Negative Voltage Regulators Linear Products (Top Vi«w) Order Information Type Package Code Part No. MA79M05 Metal FC MA79M05HM MA79M05C Metal FC jiA79M05AHC MA79M08 Metal FC MA79M08HM MA79M08C Metal FC MA79M08AHC MA79M12 Metal FC MA79M12HM MA79M12C Metal FC MA79M12AHC MA79M15 Metal FC MA79M15HM MA79M15C Metal FC MA79M15AHC Connection Diagram T0-220 Package -35 V -40 V Internally Limited —65°C to +150°C -55®C to +125®C —55®C to-*f 150°C 0#C to +125#C 0°C to +125#C 300°C 230°C Order Information Type Package ^A79M05C Molded Power Pack GH jtA79M08C Molded Power Pack GH /iA79M12C Molded Power Pack GH pA79M15C Molded Power Pack GH Code Part No. jxA79M05AUC MA79M08AUC MA79M12AUC MA79M15AUC Connection Diagram TO-39 PackageMOTOROLA Advance Information MC68701 MICROCOMPUTER UNIT (MCU) The MC68701 is an 8-bit single chip microcomputer unit (MCU) which significantly enhances the capabilities of the M6800 family of parts. It can be used in production systems to allow for easy firmware changes with minimum delay or it can be used to emulate the MC6801/03 for software development. It includes an upgraded M6800 microprocessor unit (MPU) with upward source and object code compatibility. Execution times of key instructions have been improved and several new instructions have been added including an unsigned multiply. The MCU can function as a monolithic microcomputer or can be expanded to a 64K byte address space. It is TTL compatible and requires one +5 volt power supply for nonprogramming operation. An additional Vpp power supply is needed for EPROM programming. On-chip resources include 2048 bytes of EPROM, 128 bytes of RAM, Serial Communications Interface (SCI), parallel I/O, and a three function Programmable Timer. A summary of MCU features includes: • Enhanced MC6800 Instruction Set • 8x8 Multiply Instruction • Serial Communications Interface (SCI) • Upward Source and Object Code Compatibility with the MC6800 • 16-Bit Three-Function Programmable Timer • Single-Chip or Expanded Operation to 64K Byte Address Space • Bus Compatibility with the M6800 Family • 2048 Bytes of UV Erasable, User Programmable ROM (EPROM) • 128 Bytes of RAM (64 Bytes Retainable on Powerdown) • 29 Parallel I/O and Two Handshake Control Lines • Internal Clock Generator with Divide-by-Four Output MC68701 MC68A701 (1.0 MHz) (1.5 MHz) MC68701-1 MC68B701 (1.25 MHz) (2.0 MHz) MOS (N-CHANNEL, SILICON-GATE, DEPLETION LOAD) MICROCOMPUTER WITH EPROM L SUFFIX CERAMIC PACKAGE CASE 715 FIGURE 1 - PIN ASSIGNMENT vss[ 1 • 40 3e XTAL1 [ ? 39 ]SC1 EXTAL 2 [ :j 38 ] SC2 NMI [ 4 3/ ] P30 iRQiC 5 36 ] P31 RESET/VPP[ fi 3b ] P32 vcc[ / 34 ] P33 P20[ 8 33 3 P34 P21 [ 9 32 3 P35 P22 [ 10 31 3 P36 P23 [ 11 30 3 P37 P24 [ 12 29 3 P40 P10[ 13 28 ] P41 P11 [ 14 27 3 P42 P1 2 [ lb 26 3 P43 P13 [ 16 25 ] P44 P1 4 £ 17 24 3 P45 PI 5 C 18 23 3 P46 P1 6 [ 19 22 3 P47 P17[ 20 21 3 Vcc Standby ICL7109 12 Bit Binary A/D Converter for Microprocessor Interface^^ FEATURES • 12 bit binary (plus polarity and overrange) dual slope integrating analog-to-digital converter. • Byte-organized TTL-compatible three-state outputs and UART handshake mode for simple parallel or serial interfacing to microprocessor systems. • RUN/HOLD input and STATUS output can be used to monitor and control conversion timing. • True differential input and differential reference. • Low noise — typically 15/uV p-p. • 1pA typical input current. • Operates at up to 30 conversions per second. • On-chip oscillator operates with inexpensive 3.58MHz TV crystal giving 7.5 conversions per second for 60Hz rejection. May also be operated as RC oscillator for other clock frequencies. • Fabricated using MAX-CMOS™ technology combining analog and digital functions on a single low power LSI CMOS chip. • All inputs fully protected against static discharge; no special handling precautions necessary. GENERAL DESCRIPTION The ICL7109 is a high performance, low power integrating A/D converter designed to easily interface with microprocessors. The output data (12 bits, polarity and overrange) may be directly accessed under control of two byte enable inputs and a chip select input for a simple parallel bus interface. A UART handshake mode is provided to allow the ICL7109 to work with industry-standard UARTs in providing serial data transmission, ideal for remote data logging applications. The RUN/HOLD input and STATUS output allow monitoring and control of conversion timing. The ICL7109 provides the user with the high accuracy, low noise, low drift, versatility and economy of the dual-slope integrating A/D converter. Features like true differential input and reference, drift of less than VV/°C, maximum input bias current of 10pA, and typical power consumption of 20mW make the ICL7109 an attractive per-channel alternative to analog multiplexing for many data acquisition applications. I PIN CONFIGURATION AND TEST CIRCUIT: (See Figure 1 for typical connection to a UART or Microcomputer) HIGH ORDER BYTE OUTPUTS LOW ORDER 8YTE OUTPUTS BYTE CONTROL INPUTS -G 1 GNO 2 STATUS 3 POL 4 OR 5 B12 6 B11 7 B10 8 B9 9 B8 10 B7 11 B6 12 BS 13 B4 14 B3 15 B2 16 Bl 17 TEST 18 LBER 19 RBER 20 Ce/LOAD TOP VIEW \y v^ REF IN-REF CAP -REF CAP + REF IN+ IN HI IN LO COMMON ICL7109 ,NT AZ BUF REF OUT V' SEND RUN/HOLD BUF OSC OUT OSC SEL OSC OUT OSC IN MODE DIFFERENTIAL REFERENCE O + AA/V-o INPUT HIGH ■o INPUT LOW 3.5795 MHz TV CRYSTAL •Rint = 201(11 FOR 0.2V REF = 2001(11 FOR 2.0V REF (OUTLINE DWQS DL, JL, PL) ORDERING INFORMATION Part Temp. Rang* Package Order Number 7109 7109 7109 7109 -55*C to +125 *C -20*C to +85*C -20*C to +85 *C 0*C to 70 *C 40-Pln Ceramic DIP 40-Pin Ceramic DIP 40-Pin CERDIP 40-Pin Plastic DIP ICL7109MDL ICL7109IDL ICL7109IJL ICL7109CPLOPERATIONAL AMPLIFIERS MC1458 MC1458C / MC1558 \ DUAL MC1741 INTERNALLY COMPENSATED. HIGH PERFORMANCE OPERATIONAL AMPLIFIER . . . designed for use as a summing amplifier, integrator, or amplifier with operating characteristics as a function of the external feedback components. • No Frequency Compensation Required • Short-Circuit Protection • Wide Common-Mode and Differential Voltage Ranges • Low-Power Consumption • No Latch Up (DUAL MC1741) DUAL OPERATIONAL AMPLIFIER SILICON MONOLITHIC INTEGRATED CIRCUIT G SUFFIX METAL PACKAGE CASE Ml VCC OUTPUT 1TPUT 8 NON INV INPUT 'Vy' NON INV INPUT VEE L SUFFIX CERAMIC PACKAGE CASE 632 TO-116 P2 SUFFIX PLASTIC PACKAGE CASE 646 MC1458.C (only) N. C. (J OUTPUT A (2 OFFSET ADJ A (3 OFFSET ADJ A [4 INV. INPUT d NON INV INPUT (| VeeG & <1 3vcc 3 N. C. OUTPUT ADJ B OFFSET *** ADJ B INV INPUT g] NON INV ' INPUT PI SUFFIX PLASTIC PACKAGE CASE 626 MC1468.C (only) OUTPUT A (7 INV. INPUT Q NON INV INPUT (3 VeeG VCC 7JOUTPUT B JlNV. INPUT |1nON INV INPUT04 typical parformanca logic symbol* pin assignments HEX INVERTERS TYPE POWER DELAY •04 10 mW 10 ns ‘ALS04A 1.27 mW 3.5 ns AS04 7.4 mW 3 ns 'H04 22 mW 6 ns 'L04 1 mW 33 ns 'LS04 2 mW 9.5 ns 'S04 19 mW 3 ns SN5404 (J,FH) SN54ALS04A (J,FH) SN54AS04 (J,FH) SN54H04 (J) SN54L04 (J) SN54LS04 (J,FH) SN54S04 (J.FH) SN7404 (J,N) SN74ALS04A (N,FN) SN74AS04 (N,FN) SN74H04 (J,N) SN74LS04 (J,N,FN) SN74S04 (J,N,FN) potitiva logic: Y - A (11 1 ^ (2) (3) \ (4) (5) N. (6) (9) N. (8) (11) s. (10) (13) \ (12) ■ 1Y ■2Y •3Y ■4Y •5Y ■6Y J. N PACKAGES FH. FN PACKAGES 1 1A S 4Y 1 nc 11 nc 2 1Y 9 4A 2 1A 12 4Y 3 2A 10 5Y 3 1Y 13 4A 4 2Y 11 SA 4 2A 14 5Y 5 3A 12 BY 5 nc 15 nc 6 3Y 13 6 A 6 2Y 16 5A 7 GNO 14 vcc 7 nc 17 nc 8 3A 18 6Y 9 3Y 19 6A 10 GNO 20 vccMOTOROLA Semiconductors BOX 20912 . PHOENIX. ARIZONA 85036 MC14016B QUAD ANALOG SWITCH/QUAD MULTIPLEXER The MC14016 quad bilateral switch is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each MC14016 consists of four independent switches capable of controlling either digital or anafog signals. The quad bilateral switch is used in signal gating, chopper, modulator, demodulator and CMOS logic implementation. • High On/Off Output Voltage Ratio — 65 dB Typical • Quiescent Current= 0.5 nA/package typical @ 5 Vdc • Low Crosstalk Between Switches - 80 dB typical @ 1.0 MHz • Diode Protection on All Inputs • Supply Voltage Range * 3.0 Vdc to 18 Vdo • Transmits Frequencies Up to 54 MHz @ 5 Vdc • Linearized Transfer Characteristics • Low Noise - 12nV/V Cycle, f > 1 kHz typical • Pin-for-Pin Replacement for CD4016, CD4066 MAXIMUM RATINGS (Voltages referenced to Vss> Rating Symbol Value Unit DC Supply Voltage VDD -0.5 to +18 Vdc Input Voltage, All Inputs Vin -0.5 to Vqo + 0.5 Vdc DC Currant Drain per Pin 1 10 mAdc Operating Temperature Range - AL Device CL/CP Device ta -55 to +125 -40 to +85 °C Storage Temperature Range Tstg -65 to +150 °C This device contains circuitry to protect the control inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high-impedance circuit. A destructive high-current mode may occur if Vjn and Vquj is not constrained to the range V55 < (Vjn or Voutl < Vqq- 1 McMOS SSI (LOW POWER COMPLEMENTARY MOSI QUAD ANALOG SWITCH QUAD MULTIPLEXER L SUFFIX CERAMIC PACKAGE CASE 632 P SUFFIX PLASTIC PACKAGE CASE 646 ORDERING INFORMATION MC14XXX8 — — Suffix Denotes L: Ceramic Package Plastic Package A Extended Operating Temperature Range C Limited Operating Temperature Range BLOCK DIAGRAM Vnn “ Pin 14LINEAR/DIGITAL INTERFACE CIRCUITS MC1488 ^- QUAD LINE DRIVER The MC1488 is i monolithic quad line driver designed to interface data terminal equipment with data communications equipment in conformance with the specifications of EIA Standard No. RS-232C. Features: • Current Limited Output ±10 mA typ • Power-Off Source Impedance 300 Ohms min • Simple Slew Rate Control with External Capacitor • Flexible Operating Supply Range • Compatible with All Motorola MDTL and MTTL Logic Families QUAD MDTL LINE DRIVER RS-232C SILICON MONOLITHIC INTEGRATED CIRCUIT L Suffix CERAMIC PACKAGE CASE 632 TO 116 PIN CONNECTIONS V |l || P Suffix PLASTIC PACKAGE CASE 646 CIRCUIT SCHEMATIC (1/4 OF CIRCUIT SHOWN! pins6) non]TYPES SE555, NE555 PRECISION TIMERS BULLETIN NO. DL-S 7612053, SEPTEMBER 1973-REVISED JUNE 1976 FORMERLY SN52555, SN72555 Timing from Microseconds to Hours Astabie or Monostable Operation Adjustable Duty Cycle TTL Compatible Output Can Sink or Source up to 200 mA Designed to be Interchangeable with Signetics SE555/NE555 description The SE555 and NE555 are monolithic timing circuits capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astabie mode of operation, the frequency and duty cycle may be independently controlled with two external resistors and a single external capacitor. The threshold and trigger levels are normally two-thirds and one-third, respectively, of Vcc- These levels can be altered by use of the control voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set and the output goes high. When the threshold input rises above the threshold level, the flip-flop is reset and the output goes low. The reset input can override all other inputs and can be used to initiate a new timing cycle. When the reset input goes low, the flip-flop is reset and the output goes low. When the output is low, a low-imptedance path is provided between the discharge terminal and ground. The output circuit is capable of sinking or sourcing current up to 200 milliamperes. Operation is specified for supplies of 5 to 15 volts. With a 5-volt supply, output levels are compatible with TTL inputs. functional block diagram CONTROL Vcc VOLTAGE JG OR P DUAL-IN-LINE PACKAGE (TOP VIEW) CONTROL DIS- THRES-VOLT Vcc CHARGE HOLD A<»E SUL GND TRIG OUT RESET GER PUT L PLUG IN PACKAGE (TOP VIEW)MOTOROLA MC78M00C SERIES THREE-TERMINAL POSITIVE VOLTAGE REGULATORS The MC78M00 Series positive voltage regulators are identical to the popular MC7800C Series devices, except that they are specified for only one-third the output current. Like the MC7800C devices, the MC78M00C three-terminal regulators are intended for local, on-card voltage regulation. Internal current limiting, thermal shutdown circuitry and safe-area compensation for the internal pass transistor combine to make these devices remarkably rugged under most operating conditions. Maximum output current, with adequate heatsinking is 500 mA. • No External Components Required • Internal Thermal Overload Protection • Internal Short-Circuit Current Limiting • Output Transistor Safe-Area Compensation • Packaged in the Plastic Case 221A and Case 79 (TQ-220 and Hermetic TO-39) REPRESENTATIVE SCHEMATIC DIAGRAM THREE-TERMINAL POSITIVE FIXED VOLTAGE REGULATORS Pin 1. Input 2. Output 3. Ground Bottom View G SUFFIX METAL PACKAGE CASE 79 TO 39 (Case connected to Pin 3) T SUFFIX PLASTIC PACKAGE CASE 221 A (TO 220 Type) (Heatsink surface connected to Pin 2) STANDARD APPLICATION A common ground is required between the input and the output voltages The input voltage must remain typically 2 0 V above the output voltage even during the low point on the input ripple voltage ’ - Cin is required if regulator is located an appreciable distance from power supply filter ** = Co improves stability and transient response. ORDERING INFORMATION DEVICE TEMPERATURE RANGE PACKAGE MC78MXXCG Tj 0°c to *I50°C Metal Can MC78MXXCT Tj 0° C to * t50° C Plastic Power XX indicates nominal voltage TYPE NO./VOLTAGE MC78M05C 5 0 Volts MC78M06C 6.0 Volts MC78M08C 8 0 Volts MC78M12C 12 Volts MC78M15C 15 Volts MC78M18C 18 Volts MC78M20C 20 Volts MC78M24C 24 VoltsThree Terminal Negative Regulators SG7900AI7900AC SG120/220/320 SG7900I7900C DESCRIPTION The SG7900A/7900/120/220/320 series of negative regulators offer self-contained, fixed-voltage capability with up to 1.5 amps of load current. With a variety of output voltages and four package options, this regulator series is an optimum complement to the SG7800A/7800/140/240/340 line of three terminal regulators. These units feature a unique on-chip trimming system which allows the SG7900A series to be specified with an output voltage tolerance of ±1.5%. The SG7900A versions also offer much improved line regulation characteristics. All protective features of thermal shutdown, current limiting, and safe-area control have been designed into these units and since these regulators require only a single output capacitor for satisfactory performance, ease of application is assured. Although designed as fixed-voltage regulators, the output voltage can be increased through the use of a simple voltage divider. The low quiescent drain current of the device insures good regulation when this method is used. These devices are available in hermetically sealed TO-3, TO-39 and TO-66 power packages as well as the plastic commercial power TQ-220 package. FEATURES • Output voltages set internally to ±1.5% (SG7900A) • Output current to 1.5 amp • Excellent line and load regulation • Foldback current limiting • Thermal overload protection • Voltages available--5 V, -5.2V, -8V, -12V, -15V, -18V, -20V CONNECTION DIAGRAMS FRONT VIEW CHIP LAYOUT ABSOLUTE MAXIMUM RATINGS Device Output Voltage Input Voitag* Input-Output Differential -5V -25 V 25V -5.2V -25V 25V -8 iV -35 V 30V -12V -35 V 30V -15V -40V 30V -18V -40V 30V -20V -40V 35V Storage Temperature Range .............. -65* C to +150* C Lead Temperature (Soldering, 10 Sec).............+300*C Power/Thermal Characteristic* Operating Junction Temperatura Rang* SG7900A/7900/120 ............................-55'C to +150*0 SG220 .......................................... 0°C to +150° C SG7900AC/7900/320 ............................. 0*C to +125*C Package K (TO-3) R (TO-66) P (T0-220) T (TO-39) 25* C Caie Rated Power 20W 15W 15W 2W 25* C Ambient Rated ?ower 4.3W 3.0W 2.0W 1.0W Design Current 1.5A 1.5A 1.0A 0.5A therm. Re* wc rent) *ja rc/wi 3.0 35 5.0 40 3.0 60 15 120 APPLICATIONS Fixed Output Regulator q 2.2pF INPUT —i C1 2.2pF INPUT — Circuit tor Increasing Output Voltage cTT 25h/FT NEGATIVE REGULATOR 1.Q«F — OUTPUT NOTE: 1. C1 is required only if regulator is saparatad from ractifiar filtar. 2. Both C1 and C2 should ba low E.S.R. types such as solid tantalum. If aluminum atactrolitics ara usad. at laast 10 timas values shown should ba selected 3. If large output capacities ara used, tha regulators must ba protected from momentary input shorts. A high currant diode from output to input wiH suffice. VquT * v (REGULATOR) R1 + R2 V(REG) 15 mAMC1489L - MC1489AL QUAD LINE RECEIVERS The MC1489 monolithic quad line receivers are designed to inter face data terminal equipment with data communications equipment in conformance with the specifications of El A Standard No. RS-232C • Input Resistance — 3.0 k to 7.0 kilohms • Input Signal Range - ± 30 Volts • Input Threshold Hysteresis Built In • Response Control a) Logic Threshold Shifting b) Input Noise Filtering QUAD MDTL LINE RECEIVERS RS-232C SILICON MONOLITHIC INTEGRATED CIRCUIT74 logic symbol'*' pin assignment! DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR typical performance 1PRE 1CLK 10 1CLR 2pRE 2CLK 20 2CLR (3) S (S) (2) ID <1> ^ (11) _(9)_ (12) (8) (13) ^ I Rising edge of clock pulse. SN5474 (J.FH) SN54ALS74 (J.FH) SN54AS74 (J.FH) SN54H74 (J) SN54L74 (J) SN54LS74A (J.FH) SN54S74 (J.FH) SN7474 (J.N) SN74ALS74 (N.FN) SN74AS74 (N.FN) SN74H74 (J.N) SN74LS74A (J.N.FN) SN74S74 (J.N.FN) TYPE *ma* PWR / F-F SET- UP HOLD ’74 25 MHz 43 mW 20 nsl 5 nsl 'ALS74 50 MHz 6 mW 15 nsl 0 nst ‘AS74 125 MHz 26 mW 4.5 ns 1 0 ns t 'H74 43 MHz 75 mW 1 5 nsl 5 nsl 'L74 3 MHz 4 mW 50 nsl 15 nst 'LS74A 33 MHz 10 mW 20 nsl 5 nsl 'S74 110 MHz 75 mW 3 nsl 2 nslTYPES TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC BULLETIN NO DL S 7611550. MARCH 1972-REVISED MARCH 1976 SOLID-STATE VISIBLE DISPLAYS WITH INTEGRAL TTL MSI CIRCUIT CHIP FOR USE IN ALL SYSTEMS REQUIRING A DISPLAY OF BCD DATA » 0.270-Inch-High Character » High Luminous Intensity • TIL308 Has Left Decimal • TIL309 Has Right Decimal mechanical data Easy System Interface Wide Viewing Angle Internal TTL MSI Chip with Latch, Decoder, and Driver Constant-Current Drive for Light-Emitting Diodes The display chips and TTL MSI chip are mounted on a header and this assembly is then cast within a red, electrically nonconductive, transparent plastic compound. Multiple displays may be mounted on 0.450-inch centers. PIN 1 (NO AND iOT TOM VICM AND Tl KM IMA . Of TAIL PON «OTH TV«» PIN ASSIGNMENTS FOR BOTH TYPES LATCH OUTPUT Qg (BINARY WEIGHT 2) LATCH OUTPUT Qc (BINARY WEIGHT 4) LATCH OUTPUT Q0 (BINARY WEIGHT 8) LATCH OUTPUT QA (BINARY WEIGHT 1) LATCH STROBE INPUT LATCH DATA INPUT C (BINARY WEIGHT 4) LATCH DATA INPUT D (BINARY WEIGHT 8) GROUND NO INTERNAL CONNECTION PIN 10 LATCH DATA INPUT B (BINARY WEIGHT 2) PIN 11 BLANKING INPUT PIN 12 LATCH DATA INPUT DP PIN 13 LED TEST PIN 14 LATCH OUTPUT DP PIN 15 LATCH DATA INPUT A (BINARY WEIGHT 1) PIN 16 SUPPLY VOLTAGE, VCC A. The true-position pin spacing is 0.100 between centerlines. Each pin centerline is located within 0.010 of its true longitudinal poistion relative to pins 1 and 16. B. Centerlines of character segments and decimal points are shown as dashed lines. Associated dimensions are nominal. C. Lead dimensions are not controlled above the seating plane. D. All dimensions are in inches unless otherwise specified. TIL30Q I Texas Instruments INCORPORATED POST OFFICE BOX S012 • DALLAS. TEXAS 76222lEMIURORfl DIMENSIONAL OUTLINE AND PIN ASSIGNMENTS FFD -11 & 41 FILAMENT FLAT-PACK DISPLAY h U—— 236 | I (6 0mm rX r- 0?< :t'° ’“t, b 13 COM I? COM NOTE ALL COMMON PINS MUST BE INTERCONNECTED. The IEE-AURORA Series of incandescent, flatpack digital displays offer unparalleled brightness and sharp contrast, coupled with a slim profile, volumetrically compact packaging, and long lived reliability. They are ideally suited to those applications where panel depth, wide-angle readability, high brightness, and ease of Choice of .472" or .614" high, segment tungsten filament characters, with decimal point. Sharp contrast and excellent, 120° angular readability. AC, DC, or pulsed mode of operation; standard TTL driver/decoder compatible. Slim profile — seated depth of only .248" & less than .5" overall (including pins) for minimum panel depth. Operating range of -55° to +70°C. installation are major design criteria. Available in a choice of character sizes, they may be easily adapted to a full range of colors through use of filters, and are designed to operate with a wide range of standard d-iver/decoders. Up to 13,000 F/L of brightness. Ruggedly designed for up to 100,000 hours average life expectancy. Black ceramic housing with clear glass screen. Full range of colors, if desired, through use of filters. Low power — as low as 15mA per segment at 5 VDC. Easily installed, standard 14-pin DIP package design. Easily readable in direct sunlight.MOTOROLA Sg mi conductors BOX 20912 . PHOENIX. ARIZONA 85036 MC14511B BCD-TO-SEVEN SEGMENT LATCH/DECODER/DRIVER The MC14511B BCD-to-seven segment latch/decoder/driver is constructed with complementary MOS (CMOS) enhancement mode devicesand NPN bipolar output drivers in a single monolithic structure. The circuit provides the functions of a 4-bit storage latch, an 8421 BCD-to^seven segment^decoder, and an output drive capability. Lamp test (LT), blanking (Bl), and latch enable (LE) inputs are used to test the display, to turn-off or pulse modulate the brightness of the display, and to store a BCD code, respectively. It can be used with seven-segment light emitting diodes (LED), incandescent, fluorescent, gas discharge, or liquid crystal readouts either directly or indirectly. Applications include instrument (e.g., counter, DVM, etc.) display driver, computer/calculator display driver, cockpit display driver, and various clock, watch, and timer uses. • Quiescent Current *5.0 nA/package typical 5 Vdc • Low Logic Circuit Power Dissipation • High-Current Sourcing Outputs (Up to 25 mA) • Latch Storage of Code a Blanking Input • Lamp Test Provision a Readout Blanking on all Illegal Input Combinations • Lamp Intensity Modulation Capability • Time Share (Multiplexing) Facility • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving Two Low-power TTL Loads, One Low-power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range MAXIMUM RATINGS (Voltages referenced to Vss). Rating Symbol Value Unit DC Supply Voltage V0D -0.5 to +18 Vdc Input Voltage, All Inputs Vin -0.5 to Vqq + 0.5 Vdc DC Currant Orain per Input Pin 1 10 mAdc Opereting Tempereture Renge — AL Device CL/CP Device ta -55 to +125 -40 to +85 °C Storage Temperature Range Tstg -65 to +150 Maximum Continuous Output Drive Current (Source) per Output >OHmex 25 mA Maximum Continuous Output Power (Source) per Output $ pOHmax 50 mW * pOHmex - >QH (VDO -VQH* This device contain) circuitry to protect the inputs igainst damage due to high static voltages or electric fields; however, it is advised that normal precautions be teken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. A destructive high current mode may occur* if Vjn and Vout is not constrained to the range Vgs < »< (5) _ (11) (14) n (11 n (13).. <121 OSC VCC 1(15) 5 V RNG FC (0SC1 CX CX 1 G 0 0 V [OSC] (7) (10) | (8) OSC GND pin assignments J. N PACKAGES FH. FN PACKAGES 1 2FC 9 GND 1 nc 11 nc 2 1 FC 10 2Y 2 2FC 12 GND 3 1 RNG 11 2EN 3 1FC 13 2Y 4 1CX1 12 2CX1 4 1 RNG 14 2EN 5 1CX2 13 2CX2 5 1CX1 15 2CX1 6 lEK 14 2RNG 6 nc 16 nc 7 IV ,6 °SC vcc 7 1CX2 17 2CX2 „ OSC 8 GND 16 VCC 8 llR 18 2RNG 9 1Y 19 °SC Vcc ,0 osc GND 20 VCC * Pin numbers shown on logic symbols are for J and N packages only, nc — no Internal connection. Texas Instruments POST OFFICE BOX 225012 e DALLAS. TEXAS 75265TYPES SN54121, SN54L121, SN74121. SN74L121 MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS Programmable Output Pulse Width With Rjnt... 35 ns Typ With Rext/Cext ■' • 40 ns to 28 Seconds Internal Compensation for Virtual Temperature Independence Jitter-Free Operation up to 90% Duty Cycle Inhibit Capability FUNCTION TABLE SN54121 ... J OR W PACKAGE SN54L121 ... J OR T PACKAGE SN74121, SN74L121 ... J OR N PACKAGE INPUTS OUTPUTS A1 A2 B lO O L X H X L H XXL H H X H i H 1 H H i * H L X t X L t I31313 i3111 r r r r 11 Vcc NC NC c„t C.,| Rjnt NC _ 14 . 13 12 11 10 9 _ 1 _ I—Wx—1 7L>— □ 1 Q Q J 1 -1 1 ____ 1 2 3 4 5 6 7 0 NC A1 A2 B O GND positive logic: See function table For explanation of function table symbol*, see page 3-8. description NC—No internal connection NOTES: 1. An external capacitor may be connected between Cext (positive) and R«xt/Cexf 2. To use the Internal timing resistor, connect Rjnt to Vcc» ^or improved pulse width accuracy and repeatability, connect an external resistor between Rext^cext and VCC vv,th Rlnt open-clrculted. These multivibrators feature dual negative-transition-triggered inputs and a single positive-transition-triggered input which can be used as an inhibit input. Complementary output pulses are provided. Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. Schmitt-trigger input circuitry (TTL hysteresis) for the B input allows jitter-free triggering from inputs with transition rates as slow as 1 volt/second, providing the circuit with an excellent noise immunity of typically 1.2 volts. A high immunity to Vcc noise of typically 1.5 volts is also provided by internal latching circuitry. Once fired, the outputs are independent of further transitions of the inputs and are a function only of the timing components. Input pulses may be of any duration relative to the output pulse. Output pulse length may be varied from 40 nanoseconds to 28 seconds by choosing appropriate timing components. With no external timing components (i.e., Rint connected to Vcc. Cext and Rext/Cext open), an output pulse of typically 30 or 35 nanoseconds is achieved which may be used as a d-c triggered reset signal. Output rise and fall times are TTL compatible and independent of pulse length. Pulse width stability is achieved through internal compensation and is virtually independent of Vcc and temperature. In most applications, pulse stability will only be limited by the accuracy of external timing components. Jitter-free operation is maintained over, the full temperature and Vcc ranges for more than six decades of timing capacitance (10 pF to 10/iF) and ’more than one decade of timing resistance (2 kSI to 30 kH for the SN54121/SN54L121 and 2 kSI to 40 kSl for the SN74121/SN74L121). Throughout these ranges, pulse width is defined by the relationship tw(out) " CextRT102 ** 0-7 CextRT- In circuits where pulse cutoff is not critical, timing capacitance up to 1000#/F and timing resistance as low as 1.4 kft may be used. Also, the range of jitter-free output pulse widths is extended if Vcc '* held to 5 volts and free-air temperature is 25°C. Duty cycles as high as 90% are achieved when using maximum recommended Rt- Higher duty cycles are available if a certain amount of pulse-width jitter is allowed. cc« Texas Instruments O-O4* INCORPORATED poeT offics eox 5012 • Dallas, tcxas 75222TYPES SN54LS240.SN54LS241.SN54LS244.SN54S240.SN54S241. SN74LS240,SN74LS241,SN74LS244,SN74S240.SN74S241 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS Typical Typical Typical Propagation Typical Typical Power <0L >OH Dalay Tima* Enable/ Dissipation (Sink (Sourca Disable (Enabled) Currant) Currant) Inverting Noninverting Timas Inverting Noninverting SN54LS- 12 mA -12 mA 10.5 ns 12 ns 18 ns 130 mW 135 mW SN74LS' 24 mA —15 mA 10.5 ns 12 ns 18 ns 130 mW 135 mW SN54S- 48 mA — 12 mA 4.5 ns 6 ns 9 ns 450 mW 538 mW SN74S' 64 mA -15mA 4.5 ns 6 ns 9 ns 450 mW 538 mW • 3 State Outputs Drive Bus Lines or Buffer Memory Address Registers • P-N-P Inputs Reduce D-C Loading • Hysteresis at Inputs Improves Noise Margins description These octal buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters, The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical G (active-low output control) inputs, and complementary G and G inputs. These devices feature high fan-out, improved fan-in, and 400-mV noise-margin. The SN74LS' and SN74S' can be used to drive terminated lines down to 133 ohms. schematics of inputs and outputs •LS240. 'LS241, 'LS244 EQUIVALENT OF EACH INPUT VCC- ns SN54LS240, SN54S240 ... J SN74LS240, SN74S240 ... J OR N (TOP VIEW) lAjiinjrenir^ SN54LS241, SN54S241 ... J SN74LS241, SN74S241 ... J OR N (TOP VIEW) VCC ,2o\ 1VI 1*4 IV2 2*1 IV 3 2*2 »V4 2*t -I>v- W if t T riT rrr rrr k A A l iB J 1A1 2V4 1A2 1VJ 1A3 JVJ 1A4 2V1 GNO SN54LS244...J SN74LS244 ... J OR N (TOP VIEW) 1VJ 2*2 IV4 2A1 rf s7 f Y rV rtr rrT M il 2Y4 1A2 JVJ 1A3 2Y2 2V1 GNO Texas Instruments INCORPORATED POST OFFICE SOX 5012 • DALLAS. TEXAS 75222THIS IS A LISTING OF THE FIRMWARE FOR THE REMOTE READOUT HYGROTHERMOMETER MODEL H08 3. THE PROCESSOR IS PROGRAMMED FOR A 600 BAUD TRANSMISSION RATE, DATA FRAME RATE OF 2.5 PER SECOND AND CRYSTAL FREQUENCY OF 2.4576 MHZ. THE PROGRAM INCLUDES SEPARATE SECTIONS OR PATHS FOR THE THREE AREAS OF APPLICATION: TRANSMIT, MONITOR, AND DISPLAY. HARD WIRED 1 OR 0 JUMPERS AT PORTl-O AND PORTl-1 INPUTS INDICATE THE SELECTED APPLICATION. THE PROCESSOR SCANS Pl-0 AND Pl-1 TO DETERMINE THE PATH OR SECTION OF THE PROGRAM TO FOLLOW. MEMORY MAP, ROM: LOCATION LABEL FUNCTION F800-F819 INIT INITIALIZE F860-F8AD XMTSEQ TRANSMIT SEQUENCER F8AF-F8F6 CLCK 24-HOUR CLOCK F900-F98F RCVSEQ RECEIVE SEQUENCER F9A0-F9D1 IXMTR TRANSMIT TIMER INTERRUPT FA00-FA44 IRCOMP INTERRUPT, COMPUTE CYCLE FA80-FB12 IRDTRY INTERRUPT, RCVD. DATA READY FB80-FB98 IRST INTERRUPT, RESET TMAX, TMIN FC00-FC1A DSPTST DISPLAY TEST FC30-FC3B POSL POS. TEMP. LINEARIZ. TABLE FC40-FC5A NEGL NEGATIVE TEMP. LIN. TABLE FD00-FD12 NUMB NUMBERS (2'S COMPLEMENT) FD80-FDA2 LMIT LIMITS TEST FE00-FE5C CMPT COMPUTE FE80-FF01 DSPL DISPLAY FF10-FF4F LNRZ LINEARIZE FF60-FFD5 FAHR FAHRENHEIT REQUEST FFFO-FFFF INTERRUPT VECTORS E Clock is 614 KHz, E time is 1.628 microseconds B-lLOCATION FUNCTION 0080 0081 0082 0082 0084 0086 0088 0090 00A0 00A1 00A2 00A4 00A6 00A8 00AA OOAA OOAB 00 AC 00 AD 00B0 00C0 00C1 00C2 00C3 00C5 00C7 00C8 00C9 OOCC 00 CD OOCE OOCF ■0083 •0083 ■0085 ■0087 ■0089 •009F •00A3 ■00A5 •00A7 ■00A9 •OOAB -00AC -00 BF ■00C4 •00C6 -00 CB TA, OUT OF LIMITS COUNTER TA READY FLAG TA, CURRENT RECEIVED WORD (RECEIVE) OUTPUT CHARACTER (TRANSMIT) TA, CURRENT AVERAGE TA, CURRENT MAXIMUM TA, CURRENT MINIMUM TA AVERAGE BUFFER TD, OUT OF LIMITS COUNTER TD READY FLAG TD, CURRENT RECEIVED WORD TD, CURRENT AVERAGE TD, CURRENT MAXIMUM TD, CURRENT MINIMUM FAHRENHEIT HOLDING REG. (RECEIVE) 1 SECOND TIMER-COUNTER (XMIT) 24 HOUR COUNTER-TIMER (XMIT) ERROR DELAY COUNTER ERROR FLAG BUFFER (XMIT) TD AVERAGE BUFFER TIMER INTERRUPT COUNTER COUNTER EXTENSION & ER. BUF. FLAGS TNEW TOLD $CH1 $CH2 TIMER JUMP INSTRUCTION TIMER INTERRUPT COUNTER BUFFER SELECT FLAG TCNT MSB TCNT LSB INTERRUPT VECTORS LOCATION CODE FUNCTION FFF0 FA80 RCVD DATA READY FFF2 F800 RESET FFF4 00C9 TIMER INTERRUPT FFF6 F800 RESET FFF8 FB80 IS 3 INTR. ADDRESS FFFA F800 RESET FFFC FF50 NON-MASK. INTERRUPT FFFE F800 RESET VECTORLOCATION INTERNAL REGISTERS 00 Port 1 Data Direction Register 01 Port 2 Data Direction Register 02 Port 1 Data Register 03 Port 2 Data Register 04 Port 3 Data Direction Register 05 Port 4 Data Direction Register 06 Port 3 Data Register 07 Port 4 Data Register 08 Timer Control and Status Register (TCSR) 09 Counter (High Byte) 0A Counter (Low Byte) 0B Output Compare Register (High Byte) 0C Output Compare Register (Low Byte) 0D Input Capture Register (High Byte) 0E Input Capture Register (Low Byte) OF Port 3 Control and Status Register 10 Rate and Mode Control Register (RMCR) 11 Transmit/Receive Control and Status Reg (TRCSR) 12 Receive Data Register 13 Transmit Data Register 14 RAM Control Register *********************** init ************************ (INITIALIZE) F800 8E00FE LDS II 00FE" SET UP STACK PTR. F803 CE00C0 LDX II 00C0" PT TO LOC OF RAM CLR F806 6F00 CLR 0 ,x CLEAR LOCATION F808 08 INX BUMP POINTER F809 8C0100 CPX 11 0100" CHK FOR END OF RAM F80C 26F8 BNE * -3 CONTINUE IN LOOP ********* DETERMINE OPERATING MODE ************** F80E 9602 LDAA $02 GET MODE BIT F810 8501 BITA "01" CHECK IT F812 2603 BNE * + 2 IF BIT SET, GO TO RCVR, F814 7EF860 JMP $XMIT GO TO XMIT F817 7EF900 JMP $RCVR GO TO RCVR/ ********************** XMTSEQ ************************* (TRANSMIT SEQUENCER) F860 8608 LDA " 08" INIT. PORT 1 F862 9702 STA $02 II F864 8600 LDA "00" CLEAR PORT 4 F866 9707 STA $07 II F868 97AA STA $ AA CLEAR 2 SECOND CTR F86A 9 7 AD STA $ AD CLEAR ERROR FLAG BUFR F86C 8608 LDA "08" CONFIGURE HARDWARE F86E 970F STA $0F SET UP P3-CSR F870 8602 LDA "02" SETUP RMCR (600 BAUD) F872 9710 STA $10 II F87 4 8602 LDA "02" SET UP T/R CSR F876 9711 STA $11 II F878 8608 LDA "08" SET UP TCSR F87A 9708 STA $08 II F87C CCF000 LDD " F 0 0 0 " SET UP OUTPUT COMPARE REGISTER F87F DDOB STD $0B II F881 86A0 LDA "AO" PORT 4 DATA DIR. F883 9705 STA $05 II F885 8650 LDA "54" PRESET HOURS COUNTER F887 97AB STA $AB II F889 9 7 AC STA $ AC II F88B 860C LDA "OC" PORT 1 DATA DIR REG F88D 9700 STA $00 II ************** SET UP 1 TIMER INTERRUPT VECTOR ******** F88F 867E LDA H 7E.. GET JUMP INSTRUCTION F891 97C9 STA $C9 STORE IT F893 CCF9A0 LDD "F9A0" II F896 DDCA STD $CA II *************** TRANSMITTER MAIN LOOP ****************** F898 9606 LDA $06 READ PORT 3 - START A/D CONVERSION F89A 0E CLI ENABLE INTERRUPTS F89B 8680 LDA "80" GET MASK F8AD 950F BITA $0F CHK P3 CSR, IS3 FLAG F89F 26FC BNE *-1 FLAG PRESENT, TEST AGAIN, OR: F8A1 950F BITA $0F CHK P3 CSR, IS3 FLAG F8A3 27FC BEQ *-1 FLAG NOT PRESENT, TRY AGAIN, OR:F8A5 960 7 LDA $0 7 COMPLEMENT THE TA/TD SELECT LEVEL F8A7 8880 EORA " 80" II F8A9 9707 STA $07 II ******************* CLCK ******************** (24 HOUR CLOCK) F8AB 96AA LDA $ AA GET .2 SECONDS CTR F8AD 8B0A ADDA " 0A" ADD 10 ( 0 . 2 SEC ) F8AF 19 DAA DECIMAL ADJUST F8B0 97AA STA $ AA SAVE COUNT F8B2 8100 CMPA " 00" IS IT 00? F8B4 26E5 BNE -13 NO, LOOP BACK F8B6 DCAB LDD $ AB ELSE, GET HOURS CTR F8B8 5C INCB INCREMENT LSBYTE F8B9 C100 CMPB "00" IS B=00? F8BB 2601 BNE + 2 BR IF NOT F8BD 4C INCA ELSE, INCR MSBYTE F8BE DDAB STD $ AB SAVE TIME COUNT F8C0 83A794 SUBD "A79 4" IS TIME 23H:50M:00S? F8C3 260C BNE + 7 BR IF NOT F8C5 9602 LDA $02 GET PORT 1 F8C7 8A04 ORA " 04" WRITE "HEAT" COMMAND F8C9 9702 STA $02 II F8CB 8640 LDA " 40" WRITE "ERROR" F8CD 9 7 AD STA $ AD ERROR FLAG BUFFER F8CF 202B BRA * + 21 BACK TO MAIN LOOP F8D1 DCAB LDD $ AB GET TIME COUNT F8D3 83A7D0 SUBD "A7D0" IS TIME 23:52:00? F8D6 2608 BNE + 5 BRANCH IF NOT F8D8 9602 LDA $02 GET PORT 1 F8DA 84F3 ANDA " F 3 " HEAT OFF, BALANCE ON F8DC 9702 STA $02 II F8DE 201C BRA * + 14 BACK TO MAIN LOOP F8E0 DCAB LDD $ AB GET TIME COUNT F8E2 83A7D8 SUBD "A7D8" IS TIME 23:52:15? F8E5 2606 BNE * + 4 BRANCH IF NOT F8E7 9602 LDA $02 BALANCE OFF F8E9 8A08 ORA " 08" II F8EB 9702 STA $02 II F8ED DCAB LDD $ AB GET TIME COUNT F8EF 83A8C0 SUBD "A8C0" IS T=24:00:00? F8F2 2608 BNE * + 5 BRANCH IF NOT F8F4 8600 LDA "00" CLEAR ERROR BUFFER F8F6 9 7 AD STA $ AD II F8F8 97AB STA $ AB CLEAR 24 HR CLK. F8FA 9 7 AC STA $ AC II F8FC 7EF89F JMP $ F89 B BACK TO MAIN LINE******************** rcvseq ************************** (RECEIVER SEQUENCER) F900 86F8 LDA "F8" CONFIG. HARDWARE F902 9700 STA $00 Pi DATA DIRECTION F904 86FF LDA" iippn P3 DATA DIR. F906 9704 STA $04 II F908 867F LDAA n 7pn P4 DATA DIR. F90A 9705 STA $05 II F90C 8640 LDA " 40" PORT 3 CSR F90E 970F STA $0F II F910 8602 LDA "02" SET UP RMCR F912 9710 STA $10 II F914 8618 LDA "18" SET UP T/R CSR F916 9751 STA $11 II F918 CC57DE LDD "57DE" OUTPUT COMPARE F91B DDOB STD $0B II F91D 8608 LDA "08" SET UP T CSR F91F 9708 STA $08 - II ************** set UP TIMER INTERRUPT VECTOR ************ F921 867E LDA 11 7E" GET JUMP INSTRUCTION F923 97C9 STA $C9 STORE IT F925 CCFA00 LDD "FA 00" GET TIMER IRR START ADDRESS F928 DDCA STD $CA SAVE ITF92A OE CLI TURN ON IRR F92B 96C2 LDA $C2 GET FLAGS F92D 8502 BITA " 0 2 " CHK FOR DISPLAY REQ, F92F 260F BNE * + 8 BR. IF REQUEST F931 9607 LDA $07 CHECK FOR DISP. TESr F933 8580 BITA "80" II F935 2706 BEQ * + 4 BR.IF DISPL.TEST RE{ F937 20F2 BRA *-6 LOOP BACK F939 0101 NOP F93B 0101 NOP F93D 7EFC00 JMP $DSPTST JUMP TO DISPLAY TESf r*************** SERVICE DISPLAYS *****************; F940 867F LDA ii 7 p ii SEL. TA DISPLAY F942 9402 ANDA $02 CLR PI-7 STROBE F944 9702 STA $02 II F946 DC84 LDD $84 GET TA AVERAGE F948 BDFD00 JSR $NUMB CONVERT TO SIGN/MAG F94B BDFE80 JSR $DSPL CALL DISPLAY F94E 86DF LDA ii Dp" SEL. TMAX DISPLAY F950 9402 ANDA $02 CLEAR PI-5 STROBE F952 9402 ANDA $02 II F954 DC86 LDD $86 GET TMAX F956 BDFDOO JSR $NUMB CONVERT TO SIGN/MAG F959 BDFE80 JSR $DSPL CALL DISPLAY F95C 86EF LDA n gp ii SEL. TMIN DISPLAY F96E 9402 ANDA $02 CLR. PI-4 STROBE F960 9702 STA $02 II F962 DC88 LDD $88 GET TMIN F964 BDFDOO JSR $NUMB CONVERT TO SIGN/MAG F967 BDFE80 JSR $DSPL CALL DISPLAYF96A 86BF LDA i. BF ii F96C 9402 ANDA $02 F96E 9702 STA $02 F970 DCA4 LDD $TD F972 BDFDOO JSR $NUMB F975 BDFE80 JSR $DSPL F978 86FD LDA it FD ii F97A 94C2 ANDA $C2 F97C 97C2 STA $C2 F97E 7EF92B JMP :******************* IXTMR (TRANSMIT TIMER F9A0 9608 LDA $08 F9A2 DCOB LDD $0B F9A4 C3F000 ADDD " F 0 0 0 F9A7 DDOB STD $0B F9A9 8601 LDA "01" F9AB 7C00C0 INC $ooco F9AE 95C0 BIT $co F9B0 2701 BEQ * + 2 F9B2 3B RTI F9B3 8680 LDAA "80" F9B5 950F BITA "OF" F9B7 2601 BNE * + 2 F9B9 3B RTI F9BA 9607 LDA $07 F9BC C620 LDB "20" F9BE D511 BITB $11 F9C0 2601 BNE * + 2 F9C2 3B RTI SELECT TD DISPLAY CLR. Pl-6 STROBE II GET TD AVERAGE CONVERT TO SIGN/MAG CALL DISPLAY CLEAR DISPLAY REQ.FLAG II II BACK TO MAIN LOOP *************************** INTERRUPT) READ TCSR UPDATE CTR-TIMER II II GET BIT 0 MASK INCR. PHASE COUNT CHECK PHASE BIT BRANCH IF ZERO RETURN GET BIT 7 MASK CHECK IS3, P3CSR OK TO READ A/D DATA RETURN READ PORT 4 GET BIT 5 MASK CHECK TDRE IN TRCSR OK TO XMIT BYTE RETURNF9C3 36 PSHA F9C4 841F ANDA n ^pii F9C6 811A COMPA " 1A" F9C8 2B05 BMI *+4 F9CA 32 PULA F9CB 8A60 ORA "60" F9CD 2003 BRA F9CF 32 PULA F9D0 84DF ANDA "DF" F9D2 9707 STA $07 ** transm: F9D4 8810 EORA "10" F9D6 9AAD ORA $AD F9D8 9782 STA $82 F9DA 9606 LDA $06 F9DC 9783 STA $83 F9DE BDFF10 JSR "LNRZ F9E1 9682 LDA $82 F9E3 9713 STA $13 F9E5 9683 LDA $83 F9E7 8A01 ORA "01" F9E9 C620 LDB "20" F9EB D511 BITB $11 F9ED 2602 BNE * + 2 F9EF 20 FA BRA *-2 F9F1 9713 STA $13 F9F3 3B RTI SAVE BYTE MASK OFF MS BITS COMPARE A TO +65 DEG C BR. IF NO O'HEAT GET BYTE WRITE OH AND ERROR BRANCH GET BYTE CLEAR OH BIT LOAD PORT 4 BYTE ** COMPLEMENT SIGN BIT ERROR BIT BUFFER MSBYTE GET LSBYTE (PORT 3) BUFFER LSBYTE GO LINEARIZE GET MSBYTE XMIT MSBYTE GET LSBYTE SET LS BIT CHECK TDRE IN TR/CSR II BRANCH IF OK ELSE, TRY AGAIN XMIT LSBYTE RETURNFA00 9608 LDA $08 FA02 DC OB LDD $0B FA 04 C357DE ADDD "57DE" FA07 DDOB STD $0B FA 09 9607 LDA $07 FAOB 8840 EORA "40" FAOD 9707 STA $07 FAOF 7C00CC INC $00CC FA 12 2636 BNE * + 26 FA14 96C1 LDA $C1 FA 16 8880 EORA " 80 " FA18 97C1 STA $C1 FAlA 8580 BITA "80" FAlC 262C BNE * + 21 FA IE CE0080 LDX $TABUF FA21 7 3 0 0 CD COM $BSEL FA 2 4 2603 BNE * + 2 FA26 CE00A0 LDX $TDBUF FA29 A601 LDA 1,X FA2B 8501 BITA "01" FA2D 2709 BEQ * + 5 FA2F BDFE00 JSR $CMPT FA32 86FE LDA n pE ii FA 3 4 A401 ANDA 1 ,x FA36 A701 STA 1,X FA38 9602 LDA $02 FA 3 A 8502 BITA "02" FA3C 260C BNE * + 7 FA3E 8602 LDA "02 FA40 9AC2 FA42 97C2 STA $C2 FA 4 4 9602 LDA $02 FA46 8A08 ORA "08" FA48 9702 STA $02 FA 4 A 3B RTI GET TCSR WORD GET OUTPUT COMPARE ADD 36.6 MSEC NEW OUTPUT COMPARE GET PORT 4 TOGGLE P4-6 (WATCHDOG) BUMP TIMER COUNTER BRANCH TO EXIT GET CTR EXTENSION BIT TOGGLE IT STORE IT IS IT 1? IF NOT 0, BR. TO EXIT SET POINTER TO TA BUFR COMPLEMENT BUFFER SEL. BR IF NOT ZERO, ELSE: POINT TO TD BUFFER GET STATUS BYTE WORD READY? BRANCH IF NOT READY GO TO COMPUTE CLEAR READY FLAG II II CHK. MODE II IF MONITOR, EXIT WRITE DISPLAY REQ. II II TURN ON ERROR LIGHT II RETURNFA80 DCC3 LDD $TNEW GET CURRENT TIME FA82 DDC5 STD $TOLD MOVE IT TO OLD TIME FA84 DC09 LDD $09 READ COUNTER/TMR FA86 DDC3 STD $TNEW SAVE NEW TIME * CHECK FOR OVERRUN OR FRAMING ERROR ******* FA88 DC 11 LDD $11 GET T/R CSR AND RECEIVED CHARACTER FA8A 8540 BITA w 40" CHECK FOR ORFE FA8C 270D BEQ * + 8 BR. IF NO ERROR ■ * * * ERROR FOUND, PROCESS THEN EXIT ************* FA8E 96C2 LDA $FLAGS GET FLAGS FA90 84FE ANDA H pg n CLR 1ST CHAR. FLAG FA92 97C2 STA $FLAGS SAVE FLAGS FA9 4 9602 LDA $02 GET ERROR DISPLAY FA96 8A08 ORAA "08" TURN ON ERROR LIGHT FA98 9702 STA $02 SAVE ERROR DISPLAY FA9A 3B RTI RETURN f ****** * QfJ IF CHAR RCVD IS 1ST OR 2ND BYTE ****** FA9B 37 PSHB SAVE CHARACTER FA9C DCC3 LDD $TNEW GET CURRENT TIME FA9E 93C5 SUBD $TOLD" SUBTRACT OLD TIME FA AO 833B00 SUBD "DELT" COMPARE TO REF TIME FAA3 240A BCC * + 7 BR IF 2ND CHAR, ELSE: ******* PROCESS 1ST CHARACTER ********************* FA A 5 96C2 LDA $FLAGS GET FLAGS FAA7 8A01 ORA "01" SET 1ST CHAR FLAG FAA9 97C2 STA $FLAGS SAVE FLAGS FAAB 32 PULA GET 1ST CHAR FAAC 97C7 STA $CHl SAVE 1ST CHAR FAAE 3B RTI RETURN B-llFAAF 33 PUT ~ GET CHARACTER FABO 96C2 LDA $FLAGS GET FLAGS FAB2 8501 BITA "01" CHK FOR 1ST CHAR FLAC FAB4 2601 BNE * + 2 BR. IF 1ST CHAR FLG FAB6 3B RTI ELSE, RETURN FAB 7 84FE ANDA ii pg ii CLR 1ST CHAR FLAG FAB9 97C2 STA $FLAGS SAVE FLAGS FABB D7C8 STB $CH2 SAVE 2ND CHAR ****** NOW PROCESS RECEIVED WORD ************** FABD 96C1 LDA $C1 GET ERROR BUFFER FABF 8508 BITA "08" IS IT ON? FACl 2608 BNE * + 5 BRANCH IF ON FAC 3 9602 LDA $02 GET ERROR DISPLAY FAC 5 84F7 ANDA ii p 7 ii TURN IT OFF FAC 7 9702 STA $02 DISPLAY IT FAC9 2006 BRA *+4 BRANCH FACB 9602 LDA $02 GET ERROR DISPLAY FACE 8A08 ORA "08" TURN IT ON FADO 9702 STA $02 DISPLAY IT FAD2 96C7 LDA $C7 GET MSBYTE RCVD WORD FAD4 8540 BITA « 40” CHECK ERROR FLAG FAD6 270B BEQ * + 7 BR IF NO ERROR, ELSE FAD8 9602 LDA $02 GET ERROR DISPLAY FADA 8A08 ORA "08" TURN ON ERROR LIGHT FADC 9702 STA $02 SAVE ERROR DISPLAY FADE 8502 BITA "02" CHECK MODE BIT FAEO 2601 BNE * + 2 BR IF MONITOR MODE FAE2 3B RTI RETURN FAE3 010101 NOP NO-OPS FAE6 9602 LDA $02 GET MODE BYTE FAE8 8502 BITA "02" CHECK MODE BIT FAEA 2712 BEQ *+10 GO TO AVERAGING MODE PROCESSING, OR:FAEC 96C7 LDA $CH1 GET 1ST CHARACTER FAEE C678 LDB "78" PRESELECT TA DISPLAY AND WRITE ERROR FAFO 8580 BITA "80" CHECK FOR TA BIT FAF2 2702 BEQ *+2 PROCESS TA, OR: FAF4 C6B8 LDB "B8 " SELECT TD DISPLAY AND WRITE ERROR FAF6 D702 STB $02 ENABLE DISPLAY FAF8 D6C8 LDB $CH2 GET 2ND CHARACTER FAFA BDFE80 JSR $DSPL CALL DISPLAY FAFD 3B RTI RETURN ********* averaging 1 MODE PROCESSING ************ FAFE CEO080 LDX $TABUF SET PTR TO TA BUFFER FB01 DCC7 LDD $CH1 GET RCVD WORD FB03 8580 BITA "80" CHECK FOR TA BIT FB05 2703 BEQ * + 2 PROCESS TA, OR: FB07 CEOOAO LDX $TDBUF SET PTR TO TD BUFFER FBOA BDFDOO JSR $NUMB CONVT. TO 2'S COMPL. FBOD BDFD80 JSR $LIMIT CHK FOR OUT-OF-LIMITS FB10 2507 BCS * + 5 BR. IF OK, ELSE: FB12 9602 LDA $02 GET ERROR DISPLAY FB14 8A08 ORA "08" TURN ON ERROR LIGHT FB16 9702 STA $02 SAVE ERROR DISPLAY FB18 3B RTI RETURN FB19 ED 02 STD 2, X SAVE RCVD WORD FB1B A601 LDA lfX GET STATUS BYTE FB1D 8A01 ORA "01" SET READY FLAG FB1F A701 STA 1,X RESTORE STATUS BYTE FB21 8602 LDA "02" WRITE DISPLAY REQUEST FB23 9 AC 2 ORA $C2 II FB25 97C2 STA $C2 II FB27 9 6 AC LDA $8 A GET ERR. DLY. COUNT FB29 4A DECA DECREMENT IT FB2A 2703 BEQ * + 3 BR. IF ZERO FB2C 97AC STA $8A PUT IT BACK FB2E 3B RTI RETURN FB2F 8604 LDA "04" SET CTR. TO 04 FB30 9 7 AC STA $8A II FB32 96C1 LDA $C1 GET ERR. BUFFER FB34 84F7 ANDA ii p 7 ii CLEAR E BIT FB36 97C1 STA $C1 STORE IT FB38 3B RTI RETURNFB80 CE0080 LDX $TABUF POINT TO TA BUFFER FB83 EC04 LDD 4,X GET AVERAGE FB85 ED 06 STD 6, X STORE IN MAX FB87 ED 08 STD 8 ,X STORE IN MIN FB89 CE00A0 LDX $TDBUF POINT TO TD BUFFER FB8C EC 04 LDD 4 , X GET AVERAGE FB8E ED 06 STD 6, X STORE IN MAX FB90 ED08 STD 8, X STORE IN MIN FB9 2 96C2 LDA $C2 GET FLAGS FB94 8A02 ORA "02" SET DISPLAY REQUEST FB9 6 97C2 STA $C2 RESTORE FLAGS FB98 3B RTI RETURN ***************** dsptst **** (DISPLAY TEST) **********************; FCOO 8608 LDA "08" WRITE "ERROR" FC02 9702 STA $02 II FC04 8688 LDA "88" WRITE "8.8" FC06 9706 STA $06 II FC08 8638 LDA .«38.. WRITE "-18" FCOA 9707 STA $07 II FCOC 9602 LDA $02 CLEAR STROBES FCOE 84 OF ANDA "OF" II FC10 9702 STA $02 II FC12 9607 LDA $07 DISPLAY TEST REQUEST? FC14 8580 BITA "80" II FC16 2 7 FA BEQ *-2 LOOP IF REQUEST ON FC18 7EF940 JMP RETURN********************* poSL *************************** (POS. TEMP. LINEARIZATION TABLE) FC30 0190 THRESHOLD +10 FC32 80 CORRECTION +0 FC33 0640 THRESHOLD +40 FC35 04 CORRECTION -0.1 FC36 0960 THRESHOLD +60 FC38 80 CORRECTION +0 FC39 OFFF THRESHOLD +102.3 FC3B 84 CORRECTION +0.1 ***** ************** NEG L* ***********************' ( NEGATIVE TEMP LINEARIZATION TABLE) FC40 0118 THRESHOLD -7 FC42 80 CORRECTION +0 FC43 02A8 THRESHOLD -17 FC45 04 CORRECTION -0.1 FC46 0398 THRESHOLD -23 FC48 08 CORRECTION -0.2 FC49 04B0 THRESHOLD -30 FC4B OC CORRECTION -0.3 FC4C 0578 THRESHOLD -35 FC4E 10 CORRECTION -0.4 FC4F 0690 THRESHOLD -42 FC51 14 CORRECTION -0.5 FC52 0730 THRESHOLD -46 FC54 18 CORRECTION -0.6 FC55 07D0 THRESHOLD -50 FC57 1C CORRECTION -0.7 FC58 OFFF THRESHOLD -102.3 FC5A 24 CORRECTION -0.9FD00 05 ASLD LEFT JUSTIFY FD01 05 ASLD LEFT JUSTIFY FD02 05 ASLD LEFT JUSTIFY FD03 2A07 BPL * + 5 BR IF POSITIVE FD05 43 COMA COMPLEMENT WORD FD06 53 COMB II FD07 C30001 ADDD "0001" ADD "1" FDOA 8A80 OR A A "80" RESTORE - SIGN FDOC 47 ASRA RIGHT JUSTIFY FDOD 56 RORB II FDOE 47 ASRA II FDOF 56 RORB II FD10 47 ASRA II FDll 56 RORB II FD12 39 RTS RETURN ********************* lmit ************************ (CHECK DATA AGAINST LIMITS) FD80 DDC7 STD $CH1 FD82 EC04 LDD 4,X FD84 93C7 SUBD $CH1 FD86 BDFDOO JSR $NUMB FD89 840F ANDA "OF" FD8B 830040 SUBD "LIMIT FD8E 230B BLS * + 7 FD90 6C00 INC 0,X FD92 8603 LDA "03" FD94 A100 CMPA 0,X FD96 2303 BLS * + 3 FD98 OC CLC FD99 2005 BRA * + FD9B 8600 LDA "00" FD9D A700 STA 0,X FD9F 0D SEC FDA0 DCC7 LDD $CH1 FDA2 39 RTS SAVE READING GET AVERAGE SUBTRACT NEW RDG. CONVT TO SIGN/MAGN MASK OFF SIGN COMPARE TO 2 DEGREES BR IF IN LIMIT INCR "OUT" COUNTER GET "03" COMPARE IT TO "OUT" COUNTER BR IF GRTR THAN 3 OUT, CLEAR CARRY EXIT CLEAR A IN, SET CARRY SAVE RETURN O a fa w EH * * fa D * ■K z o s fa ■K * w < fa s * * * * c S = « > U o u < * w < m cq < * C < C fa Eh fa CO * Q Q fa Eh W SB Eh * * J J o w CQ CQ fa * * * * * * * * * * CN CN O CN OinHH * * U O 00 U 00 o o o * ■K VO vo *£ r» LO VO H r-H O'! * * CT\ Q O Q CO CN O o ro ■fc * * * * * O CN -tf* VO 00 r , dATa IT_I FAHRENHEIT $AC-$AI) OOAE-OOAF VACANT 1 V - — % % V TIMER INTR.CTR., IRQZ X CTR. EXTENS. X E BUFFER PWI ON 1 FLAGS m MSB TNEW TMR. SAV. REG. LSB TNEW TME. SAV. REG. MSB TOLD TMR. SAV. REG. LSB TOLD TMR. SAV. REG. CHARACTER 1 CHARACTER 2 JMP. INSTR. TMR. INTR. JUMP INSTRUCTION FOR TMR. INTR. TIMER INTR. CTR. BUFFER SELECT FIG. 00=TD, FF=TA TA TA AVERAGE TA MAX TA MIN E DELAY COUNTER \ TA AVERAGING BUFFER TD IURRENT RCVD. V®. TD AVERAGE TD MAX TD MIN FAHRENHEIT HLDG. REG. IN XMIT ONLY: $AA IS 2 SEC. TIMER SAB/AC IS 24-HR TIMER $AD IS ERROR BUFFER TD AVERAGING BUFFER \ MEMORY MAP, RAM"CLCK"SET UP I/O PORTS TIMER, ETC. F92B DISPLAY REQUEST FLAG ? SERVICE DISPLAYS F940 CLEAR DISPLAY REQUEST CLAG$F940 SELECT SERVICE DISPLAYS TA / NUMB \INTERRUPT TRANSMIT TIMER$FA80 INTERRUPT '-T RECEIVED DATA READY (SCI) I UPDATE $TNEW, $TOLD GET NEW CHAR. & CSR SAVE NEW CHAR. CLR. 1st CHAR. ELG v YES w AND TURN ON ERROR LT. i ' ( RETURN ) COMPUTE A T=TNEW-TOLD COMPARE A TO REF. T YES ^AT<30000 \Hst CHAR) GET NEW CHAR GET FI ^AGS CLR. 1st gHAR ELG. SAVE 2nd CHAR. SET 1st CHAR ELG. GET NEW CHAR. & SAVE ITCHECK ERROR BUFFER BIT & SET/CLEAR. ERROR LT.DISPLAY THE DATA $FAFE AVERAGING MODE PROCESSING SET TA BUF. PTR. & GET 1st & 2nd CHAR, TURN ON ERROR BUFFER. BIT I SET TD BUFFER PTR. i > NO STORE 1st & 2nd rrjAP to CURRENT RCV. WORK BUF. i SET WORK RDY. FLG. I CLEAR E BUFF. BIT EVERY 4th CYCLE$FB80 INTERRUPT, RESETS, TMAX, TMINDSPTST$FDOO 2'S COMPLEMENT SIGN/MAGNITUDE CONVERTERf LMIT ^ _T_ SAVE READING I GET CURRENT AVERAGE I MASK OFF SIGN $FD80 CHECK DATA READING FOR OUT-OF-LIMITS SUBTRACT: AVG-DATA A L Iff CONVERT A TO SIGN/MAGNITUDE SUBTRACT 2° NO INCR. "OUT” COUNTER 1 GET ’ ’03” 1 COMPARE TO ' 'OUT11 CTR. 2 DEGREES IS ARBITRARY LIMIT RESET nOUT,T CTR. 3 TIMES IS ARBITRARY LIMIT CLEAR, CARRY FLAG YES .. SET RESTORE CARRY FLAG READING ^RETURN ^ B39$FEOO COMPUTE SUBROUTINE COMPARE CU^NT STORE AVG. IN MIN. BUFFER STORE DATA SUMMATION OF AVG. BUFFER DIVIDE S' STORE AVG. IN MAX. BUFFER STORE NEW AVG. SHIFT AVERAGE BUFFER COWARE CURRENT MAX C°Y ) _1_ GET FLAGS THEN SET PWR. FLG.A $FEB4 CONVERT TO BCD $FEEDYES.,. FAHR. REQUE£ NO$FF10 LINEARIZE YES PTR. TO POS. TABLE , r GET THRESHOLD ^>TH rshNs. YES GET CORRECTION I STORE CORRECTED DATA PTR. TO NEG. TABLE INCR. PTR. TRY NEXT THRSHLD J ADD SUBTR. CORRECTION CORRECTION$FF60 I FAm-) CONVERT TO FAHRENHEIT SAVE SIGN , MULT. T°C xl.8 \ i CHECK SIGN NO ADD 32c RIGHT JUSTIFY C EXIT GET 2'S LaJJ\1t i_i« , . DISPLAY - y f RIGHT JUSTIFY I ( HIT ) YES DISPLAY + , , RIGHT JUSTIFYbd i o\ TA TD V 12 18 2d 21 I RUN/HOLD STATUS RUN/HOLD STATUS LBEN- HBEN- CE- MODE IN HI 7109 A-TO-D 22LpJ23 2.458MH3 POL B12 Bll BIO B9 B8 B7 B6 B5 B4 B3 B2 B1 25 TA/TD- SELECT 3 + IS "1" as P44 +/- 5 26 *P43 51.2° P24 6 27 P42 25.6° 7 28 P41 12.8° 8 29 P40 6.4° 9 30 P37 3.2° P20 P21 10 ;-n P36 1.6° 11 32 P35 0.8° 12 33 P34 0.4° P22 .13 34 P33 0.2° 14 35 P32 0.1° 15 3d P31 .05° 16 37 P30 .025° P12 ERROR ^ r,:i P46 (DOT ER M 24 P45 MC68701 P10 ^^2.458 MH3 3 EXTAL 2 Pll CLOCK P47 39. 22 12. SERT AT OUTPUT -VvVH> +Vcc MODE 7 SELECT 15. HEATER FUNCTION A B TRANSMIT • RECEIVE • MONITOR v. TRANSMITTER I/O PQB3LASSIGNMENTS80° 40° 20° 10° 8° 4° 2° 1° .8° .4° .2° .1° TA- TD- TMX- TMN- ERROR \ > DISPLAY STROBES / RECEIVER/MONITOR I/O PORT ASSIGNMENTSBIT WEIGHTING B1 .025° B2 .05° B3 .1° B4 .2° B5 .4° B6 .8° B7 1.6° B8 3.2° B9 6.4° BIO 12.8° Bll 25.6° B12 51.2° POL. "1" = MINUS CODING IS MACHESTER (Bl-PHASE) 600 BAUD 1.66 TRANSITION AT EACH BIT PERIOD 0 11 0 0 wu TRANSITION AT \ PERIOD INDICATES DATA "1" SERIAL DATA FORMATITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 1B1 1 ASPIRATOR FAN 1063-108 TSL 1 2 1P2 1 PLUG, 26-PIN, MIL-C-26482 MS3116F-16-26P BURNDY 1 3 lAl! 1 DEW-POINT SENSOR ASSEMBLY 1063-104 TSL 1 4 1P1 1 PLUG, 15-PIN FEMALE 17-10150-1(390) AMPHENOL 2 5 N/A 6' CABLE, ASPIRATOR #7410 QUABBIN 1 6 N/A 1 NAMEPLATE 1063-1005-1 TSL 1 7 N/A 4 SPACER, 1/4” HEX,4-40,1-1/2" 1063-1001-3 TSL 4 8 N/A 8 SCREW,4-40,PH. PAN 3/8" 16 9 N/A 8 #4 LOCK WASHERS 12 10 N/A 1 6-32 FLAT HEAD, 1/4" SCREW 1 11 N/A 2 6-32 PH. PAN HD., 1/4" SCREW 6 12 N/A 8 #6 LOCK WASHER 81 13 N/A 5 6-32 PH. PAN HD., 7/16" SCREW 5 14 N/A 1 SPACER, 1/4", 7" LONG, 6-32 TAP 1063-1001-1 TSL 1 15 N/A 9 6-32 PH. PAN HD., 3/8" SCREW 87 16 N/A 6 #6 NYLON FLAT WASHER 40UNIT 1 ITEM # 17 18 19 20 21 22 23 24 25 26 27 28 29 30 REF. DESIG N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A QTY. PART DESCRIPTION ASPIRATOR UNIT PART NO 1063-100 MANUFACTURER QTY. PER SYSTEM 1 CAPTIVE SCREW,10-32,3/8 2 6-32 HEX NUT 8 #4 FLAT WASHER GROMMET,7/16 ID,3/4 OD TY-DOWN CLAMP RADIATION SHIELD FAN GUARD INLET SCREEN ASPIRATOR DOME MOUNTING STRUTS, SET BOTTOM PLATE TOP PLATE ASPIRATOR TUBE ASPIRATOR DECK PLATE 2368 91124 CTM-1 1063-106 550648 1063-110 1063-111 1063-4011 1063-103-1 1063-103-2 1063-105 1063-102 H.H. SMITH H.H. SMITH TYTON TSL ROTRON TSL TSL TSL TSL TSL TSL TSL 1 63 81A1 DEW-POINT SENSOR ASSEMBLY 1063-104 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 1A1CR1 1 LED, INFRARED TIL-31 TEXAS INST. 1 2 1A1Q1-Q2 2 PHOTOTRANSISTOR TIL-81 TEXAS INST. 2 3 1A1U1' 1 THERMOELECTRIC COOLER 1063-1044 TSL 1 4 1A1RT1-RT2 2 PLATINUM TEMPERATURE SENSOR PT-139-AP YELLOW SPRINGS 2 5 lAlJl 1 CONNECTOR, 15-PIN MALE 745062-4 AMP 1 6 N/A 1 MIRROR BLOCK 1063-1045 TSL 1 7 N/A 1 PC BOARD, OPTICS 1063-1041 TSL 1 8 N/A 1 PC BOARD, AMBIENT 1063-1042 TSL 1 9 N/A 1 PC BOARD, SENSOR 1063-1043 TSL 1 10 N/A 1 BRIDGE SHIELD 1063-107-1 TSL 1 11 N/A 4 4-40, 3/8" PH. PAN SCREW 16 12 N/A 4 4-40, 1" FILLISTER HEAD SCREW 4 13 N/A 8 4-40, HEX NUT 8 14 N/A 8 #4 NYLON FLAT WASHER 16 15 Rl, R2 2 RESISTOR, METAL FILM,1/4W,1% FACTORY SELECTED,NOM. VALUE,47.5K RN-60C DALE ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 2TB1-TB2 2 BARRIER STRIP , 3 TERMINAL 72103 BEAU 2 2 2 Jl 1 CONNECTOR, 26 PIN FEMALE MS 3114E-16-26S ITT CANNON 1 3 2X2 1 PLUG, 15-PIN "D" , FEMALE 17-10150-1(390) AMPHENOL 2 4 2A3 1 POWER SUPPLY, 5 VOLTS DC 1063-202 TSL 2 5 2A4 1 AUXILIARY POWER SUPPLY 1063-203 TSL 1 6 2A1 1 PC ASSEMBLY, TRANSMIT LOGIC 1063-204 TSL 1 7 2X1 1 PC CONNECTOR, 6-PIN, CARD EDGE 6007-006-940-012 ELCO 2 8 2A2 1 CALIBRATOR ASSEMBLY 1063-205 TSL 1 9 2S1 1 SWITCH, DPDT 35059-22 MS 39 50 1 10 2F1 1 FUSE, 2 AMPS AGC-2A BUSSMAN 2 11 2XF1 1 FUSE MOUNT HKP BUSSMAN 2 12 2S2 1 SWITCH, SPDT, MOMENTARY 35058-27 MS 39 50 1 13 2X3 1 PC CONNECTOR, 22-PIN,CARD EDGE 6007-022-940-012 ELCO 1 14 2Zl 1 LINE FILTER 2JX5102A SPRAGUE 1 15 N/A 1 NAMEPLATE 1063-1005-2 TSL 1 16 N/A 28 6-32, PH. PAN HD. 3/8" SCREW 87ITEM # 17 18 19 20 21 22 23 24 25 26 27 28 29 30 REF. DESIG N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 2J2 N/A QTY. PART DESCRIPTION 30 #6 LOCK WASHER 8 6-32 HEX NUT 2 4-40 PH. PAN HD. 1/2" SCREW 2 #4 LOCK WASHER 4 STANDOFF, 3" 6 STANDOFF, 3/4" 4 #6 NYLON FLAT WASHER 2 CARD GUIDE 2 POLARIZING INSERT 4 6-32, PH. PAN HD., 3/4" SCREW 2 4-40, HEX NUT 1 GROMMET, MS-35489-20 1 RECEPTACLE, 9-PIN, FEMALE 1 MOUNTING BRACKETS, PAIR PART NO. MANUFACTURER 8263 2211 DC-600 60-6007-32-15 H.H.SMITH KEYSTONE BIVAR ELCO QTY. PER SYSTEM 81 63 16 12 4 12 40 4 5 17-1009 0-1( 390) AMPHENOL D4G819-1 AMPHENOL2PS1 5 VOLT DC POWER SUPPLY 1063-202 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 T1 1 POWER TRANSFORMER , 11V/10V ST7-10 SIGNAL 2 2 CR1-CR4 4 SILICON RECTIFIER 1N5400 MOTOROLA 16 3 Cl 1 CAPACITOR, ELECTR., 4000uF/15V TCG 402 UO15 N1L MALLORY 5 4 C2 1 CAPACITOR, TANTALUM, 10uF/35V TIM106K035POY MALLORY 16 5 VRl 1 ICf 5 VOLT REGULATOR SG323K SILICON GEN 1L 2 6 VR2 1 ZENER DIODE, 6.8Vr 5W 1N5342 MOTOROLA 2 7 N/A 1 PC CARD, 5 VOLT PWR SUPPLY 1063-202PC TSL 2 8 N/A 1 HEAT SINK 690-3-B WAKEFIELD 3 9 N/A 4 SPACER, 1/2" 1457C KEYSTONE 4 10 N/A 4 6-32 PH. PAN HD. 1 1/2" SCREW 4 11 N/A 6 #6 FLAT WASHER 14 12 N/A 6 #6 LOCK WASHER 81 13 N/A 6 #6 HEX NUT 63 14 N/A 2 6-32 PH. PAN HD. 3/8" SCREW 87 5 VOLT DC POWER SUPPLY (FOR TRANSMITTER UNIT)2 PS 2 ITEM # REF. DESIG. QTY PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 N/A 1 CHASSIS 1063-2032 TSL 1 2 T1 1 POWER TRANSFORMER, 115V/10V 241-7-10 SIGNAL 2 3 CR1-CR3 3 SILICON RECTIFIER 1N1200 MOTOROLA 3 4 Cl 2 CAPACITOR, ELECTR., 4000uF/15V TCG402U015N1L MALLORY 5 5 Q1 1 SILICON PNP DARLINGTON TRANS. 2N6050 RCA 1 6 Q2 1 SILICON NPN DARLINGTON TRANS. 2N6057 RCA 1 7 Al 1 +- 12 VOLT CONVERTER 1063-2031 TSL 1 8 N/A 2 8-32 FLAT HEAD 3/8" SCREW 2 9 N/A 2 #8 LOCK WASHER 2 10 N/A 2 #8 HEX NUT 2 11 N/A 4 STANDOFF, 1/4" 8248 H. H. SMITH 4 12 N/A 8 #6 LOCK WASHER 81 13 N/A 4 #6 HEX NUT 63 14 N/A 4 #6 NYLON FLAT WASHER 40 15 N/A 4 6-32 PH. PAN HD. 1/4" SCREW - 6 oo 00 2PS2 AUXILIARY POWER SUPPLY 1063-203 ITEM # REF. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER DESIG. SYSTEM 16 N/A 4 6-32 PH. PAN HD. 3/8" SCREW 87 17 N/A 4 #6 FLAT WASHER 14 18 N/A 2 TRANSISTOR MOUNT 4616 KEYSTONE 2 19 N/A 3 FIBER SHOULDER WASHER 4702 KEYSTONE 3 20 N/A 3 NYLON FLAT WASHER, #10 3352 KEYSTONE 3 21 N/A 3 #6-32, PHIL. FLAT HD., 1/4" 22 N/A 3 HEX STANDOFF 52-1508 H.H. SMITH 3 23 N/A 3 10-32 HEX NUT 2 24 N/A 2 MICA INSULATOR, TO-3 4662 KEYSTONE 2 25 N/A 2 #6 SOLDER LUG 1415-6 H.H.SMITH 1 26 N/A 1 #8 SOLDER LUG 1416-8 H.H.SMITH 3 27 N/A 3 #10 SOLDER LUG 1414-10 H.H.SMITH AUXILIARY POWER SUPPLY PAGE 2 OF 22PS2A1 ITEM # REF. DESIG. QTY. PART DESCRIPTION 12 VOLT CONVERTER PART NO. MANUFACTURER 1063-2031 QTY. PER SYSTEM 1 Tl 1 TRANSFORMER f INVERTER 4831 PICO 1 / 2 Q1-Q2 2 SILICON NPN TRANSISTOR 2N5320 RCA 2 3 CR1-4 4 6 SILICON RECTIFIER 1N5400 MOTOROLA 16 4 U1 1 IC, +12 VOLT REGULATOR MC78M12CG MOTOROLA 1 5 U2 1 IC, -12 VOLT REGULATOR UA79M12AHC FAIRCHILD 1 6 Cl 1 CAPACITOR, CERAMIC, 0.1uF/50V CK05BX104K AVX 14 7 C2-C3 2 CAPACITOR, TANTALUM, 10uF/35V TIM106KO35POY MALLORY 16 8 R1-R2 2 RESISTOR, CARBON 68/ 1/2W, 5% RC07GF201J ALLEN-BRADLEY 2 9 R3 1 RESISTOR, CARBON 62/ 1/4 W, 5% RC07GF620J ALLEN-BRADLEY 1 10 N/A 1 PC CARD, AUXILIARY POWER SUPPLY 1063-2033 TSL 2 11 R4 1 RESISTOR, CARBON 100/ 1/4 W, 5% RC07GF101J ALLEN-BRADLEY 1 12 R5 1 RESISTOR, CARBON 4700/ 1/4 W, 5% RC07GF472J ALLEN-BRADLEY 2 13 R6 1 RESISTOR, WIRE-WOUND,2 W, .47 BHW TRW/IRC 3 14 C4-C5 2 CAPACITOR,TANTALUM, 2.2uF/35V 199D225X0035BA1 SPRAGUE 2 15 C6 1 CAPACITOR,CERAMIC,.47/50 CK06BX474K AVX 3 16 C7 1 CAPACITOR,TUBULAR,.0068/600V 715P68256JD3 SPRAGUE 12PS2A1 12 VOLT CONVERTER 1063-2031 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 17 R7 1 RESISTOR, CARBON, 100/ 1/2W RC20GF101J ALLEN-BRADLEY 1 18 J1 1 RECEPTACLE, 15-PIN "DM 745103-1 AMP 1 19 SL1,SL2 2 SURGE LIMITER, 150 VAC S07K150 SIEMENS 6 20 N/A 4 TRANSISTOR PAD 501-075 WALDOM 62A1 TRANSMIT LOGIC P.C. ASSEMBLY 1063-204 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 Ul,U15 2 IC, MICROPROCESSOR MC 68 701 MOTOROLA 3 2 U2 1 IC, A-TO-D CONVERTER IC7109 CPL INTERSIL 1 3 U3,U5-9,U21 7 IC, DUAL OP-AMP MC1558U MOTOROLA 7 4 U4 1 IC, HEX INVERTER 7404 MOTOROLA 1 5 U10 1 IC, ANALOG GATE 14016B MOTOROLA 1 6 Ull 1 IC, LINE DRIVER MC1488 MOTOROLA 1 7 U12 1 IC, TIMER NE555P TEXAS INST. 1 8 U13 1 IC, +5 VOLT REGULATOR MC78M05CG MOTOROLA 1 9 U14 1 IC, -5 VOLT REGULATOR SG320T-5.2 SILICON GEN 1L 1 10 U16 1 IC, LINE RECEIVER MC1489 MOTOROLA 2 11 U17 1 IC, DUAL FLIP-FLOP SN7474N TEXAS INST 1 12 U18-U20 3 ic, DECIMAL DISPLAY TIL-308 TEXAS INST 3 13 N/A 1 PC CARD, TRANSMIT LOGIC 1063-2041 TSL 1 14 Rl,R3,R6 ,R10, R30-31, R49, R65 rR67 9 RESISTOR, CARBON, 1000/ 1/4W 5% RC07GF10 2J ALLEN-BRADLEY 11 15 R2 f R5 , R8 , Rll, R12 ,R23-28 , R32-33 ,R44, R47,R74-R76 18 RESISTOR, CARBON, 100K/ 1/4W 5% RC07GF10 4J ALLEN-BRADLEY 18 TRANSMIT LOGIC P.C. ASSEMBLY PAGE 1 OF 4o 2A1 TRANSMIT LOGIC P.C ITEM # REF. QTY. PART DESCRIPTION DESIG. 16 R9 1 17 R13,R20 3 18 R14,R17, R64 3 19 R15, R18 3 20 R16,R19 2 21 R53 1 22 R21-22 , R34-35 , R51-52 6 23 R29,R69 2 24 R36 1 25 R37 1 26 R77 1 27 R38-43 , R48,R50 , R56-63,R73 17 28 R4,R71-72 3 29 R7,R54 , R66,R70 4 RESISTOR, CARBON, 470K/ 1/4W RESISTOR, METAL FILM, 1240/ 1% RESISTOR, METAL FILM, 59 K/ 1% RESISTOR, METAL FILM, 4.99K/ 1% RESISTOR, METAL FILM, 97.6K/ 1% RESISTOR, METAL FILM, 249K/ 1% TRIMPOT, 5K RESISTOR,CARBON,2200/ 1/4W,5% RESISTOR, METAL FILM, 100K/ 1% RESISTOR, METAL FILM, 48.7K/ 1% RESISTOR, METAL FILM, 49.9K/ 1% RESISTOR, CARBON, 12K/ 1/4W,5% RESISTOR, CARBON, 22K / 1/4W,5% RESISTOR, CARBON, 150 / 1/4W,5% TRANSMIT LOGIC P.C. ASSEMBLY 1063-204 PART NO. MANUFACTURER QTY. PER SYSTEM RC07GF474J ALLEN-BRADLEY 1 RN60C DALE 3 RN60C DALE 3 RN60C DALE 3 RN60C DALE 2 RN60C DALE 1 RJ26FW502 TECHNO 6 RC07GF222J ALLEN-BRADLEY 2 RN55C DALE 1 RN55C DALE 1 RN55C DALE 1 RC07GF123J ALLEN-BRADLEY 50 RC07GF223J ALLEN-BRADLEY 3 RC97GF151J ALLEN-BRADLEY 42A1 ITEM # 30 31 32 33 34 35 36 37 38 39 40 41 42 REF. DESIG. QTY. R68 1 C2,C4,C5 3 CIO 1 Cl,C3,C7, 12 C9,C14,C19, C20,C22, C25-27 Cll 1 C12 1 C6,C8, C15,C17, 6 C18,C24 C13,C16 2 C21 1 CRl-4/CR12 5 CR5-CR9 5 VRl 1 Y1 1 TRANSMIT LOGIC P.C PART DESCRIPTION RESISTOR, CARBON, 6800/ l/4Wr5% CAPACITOR, TANTALUM,33uF/16V CAPACITOR, FILM, .luF/80V CAPACITOR, CERAMIC,0.1uF/50V CAPACITOR, CERAMIC, .22uF/50V CAPACITOR, CERAMIC, 1 UF/50V CAPACITOR, TANTALUM,10uF/35V CAPACITOR, CERAMIC, .01uF/100V CAPACITOR, CERAMIC, .47/50V SILICON DIODE LED, AMBER ZENER REFERENCE DIODE, 6.2V CRYSTAL, MICRO., 2.45 MHz TRANSMIT LOGIC P.C ASSEMBLY 1063-204 PART NO. MANUFACTURER QTY. PER SYSTEM RC07GF68 2J ALLEN-BRADLEY 1 199 D336X0016DB1 SPRAGUE 4 192P SPRAGUE 2 CK05BX104K AVX 14 CK06BX224K AVX 1 CK06BX105K SPRAGUE 1 TIM106K035POY MALLORY 16 CK05BX103K AVX 2 CK06BX474K AVX 3 1N914 GEN. ELEC. 5 LN41YCP.HL PANASONIC 5 1N825 MOTOROLA 1 B245 (HC-18) FREQ. CONTROL 2 ASSEMBLY PAGE 3 OF 42A1 TRANSMIT LOGIC P.C. ASSEMBLY 1063-204 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 43 SI 1 SWITCH, MIN. TOGGLE, SPDT 1101M2CB C & K 1 44 SL1 1 SURGE LIMITER, 18 VDC S07K14 SIEMENS 1 45 XI,X2 2 SOCKET, 40-PIN DIP 24 0-AG49 D AUGAT 3 46 X3-X5 1 SOCKET, 16-PIN DIP 216-AG49 D AUGAT 3 47 CR10-11 2 ZENER DIODE, 3.3V 1N746 ITT 3 48 N/A 2 CARD EJECTOR S-200 SCANBE 4 49 R45 1 RESISTOR, CARBON, 330K/ 1/4W,5% RC07GF334J ALLEN-BRADLEY 1C15 PARTS LIST 2A2 CALIBRATOR ASSEMBLY 1063-205 ITEM # 1 REF. DESIG. SI QTY. 1 PART DESCRIPTION SWITCH, 2 POLE, 4 POSITION PART NO. 5 0 MP 36-01-2-04N MANUFACTURER GRAYHILL QTY. PER SYSTEM 1 2 Rl, R4 2 RESISTOR, 79.95/ .02% KRL-560 KRL 2 3 R2,R5 2 RESISTOR, 100.0/ .02% KRL-560 KRL 2 4 R3 ,R6 2 RESISTOR, 119.75/ .02% KRL-560 KRL 2 5 N/A 1 PC CARD, CALIBRATOR TSL-2051 TSL 1 6 N/A 1 SPACER, 6 -32 HEX, 1/2" 8423 H.H. SMITH 1 CALIBRATOR ASSEMBLY PAGE 1 OF 1UNIT 3 DISPLAY UNIT 1063 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. SYS' 1 3A4A1-A4 4 P. C. ASSY, NUMERIC DISPLAY 1063-301 TSL 4 2 N/A 4 BEZEL, AMBER FILTER DMH23441A-04 IEE-ATLAS 4 3 3A3 1 DISPLAY POWER SUPPLY, 6 VDC 1063-302 TSL 1 4 N/A 1 NAMEPLATE TSL 1 5 3A2 1 5 VOLT POWER SUPPLY, 5 VDC 1063-202 TSL 2 6 3A4 1 DISPLAY MOTHERBOARD 1063-1003 TSL 1 7 3A1 1 PC ASSY, RECEIVE LOGIC 1063-303 TSL 1 8 3 Jl 1 RECEPTACLE, 3-PIN FEMALE 91-T-3263-9 AMPHENOL 1 9 3J2 1 FILTER/RECEPTACLE 3EF1 CORCOM 1 10 3X1 1 PC CONNECTOR, 44-PIN CARD EDGE 6007-044-941-012 ELCO 1 11 3F1 1 FUSE, 2 AMP 3 AG BUSSMAN 2 12 3XF1 1 FUSE MOUNT HKP BUSSMAN 2 13 N/A 1 MATING INPUT SIGNAL PLUG 91T-3260-1 AMPHENOL 1 14 N/A 1 AC LINE CORD 531 ALPHA 1 15 3S1f 3S5 2 SWITCH, DPDT TOGGLE 8373K127C CUTLER-HAMMER 2 16 3S2-3S4 3 SWITCH, MIN. PUSH-BUTTON 35-1 GRAYHILL 3ITEM # 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 3R1 1 POTENTIOMETER, 25K RV6NAYSD253A CLAROSTAT 1 3DS1 1 LED INDICATOR, RED L45RN-R2-2111 LEECRAFT 1 3X2 1 PC CONNECTOR, 6-PIN CARD EDGE 6007-006-940-012 ELCO 2 3X3 1 PC CONNECTOR, 10-PIN CARD EDGE 6007-010-940-012 ELCO 1 3J3 1 JUMPER, "DIP-TO-D" 1063-304 TSL 1 N/A 1 KNOB, BLACK MATTE, 1/8" SHAFT 70-3-lG RAYTHEON 1 N/A 2 PANEL LOCK HPL2-2-1 HARTWELL 2 N/A 1 TILT SLIDE, 1 PAIR SS168 D-14 GRANT 1 N/A 42 6-32 PH. PAN HD. 3/8" SCREW 87 N/A 40 #6 LOCK WASHER 81 N/A 25 #6 HEX NUT 63 N/A 2 4-40 PH. PAN HD. SCREW, 1/2" 16 N/A 2 #4 LOCK WASHER 12 N/A V 8 STANDOFF, 3/4" 2211 KEYSTONE 12 N/A 14 #6 NYLON FLAT WASHER 40 DISPLAY UNIT PAGE 2 OF 3810 UNIT 3 ITEM # 33 34 35 36 37 38 39 40 41 42 43 DISPLAY UNIT REF. DESIG N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 3A4 QTY. PART DESCRIPTION 6 MALE-FEMALE THREADED SPACER 16 #4 NYLON FLAT WASHER 6 6-32 PH. PAN HD. 1/4" SCREW 2 CARD GUIDE 3 POLARIZING INSERT 4 WIRE MOUNTING BASE, NYLON 18 4-40 HEX NUT 4 8-32 PH. PAN HD., 3/8" SCREW 4 #8 LOCK WASHER 4 #8-32 HEX NUT 1 DISPLAY MOTHERBOARD PART NO. 8248 DC-600 60-6007-32-15 MB-3 A MANUFACTURER H.H.SMITH WALDOM ELCO TYTON 1063-300 QTY. PER SYSTEM 16 6 4 5 4 1063-1003 TSL DISPLAY UNIT PAGE 3 OF 3 PARTS LIST 3A1-3A4 NUMERIC DISPLAY ASSEMBLY 1063-301 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 U1-U4 4 DIGITAL DISPLAY MODULE FFD-41 IEE 16 2 U5-U9 5 BCD LATCH-DECODER-DRIVER MC14 511BCP MOTOROLA 20 3 X1-X4 4 DIP SOCKET, 14-PIN 214-AG49 D AUGAT 16 4 N/A 1 PC CARD, NUMERIC DISPLAY 1063-301PC TSL 4 5 Rl 1 RESISTOR, CARBON, 100/ 1/4W, 5% RCR07GF101J ALLEN-BRADLEY 2ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 T1 1 POWER TRANSFORMER, 115V/10V 241-7-10 SIGNAL 2 2 CR1-CR4 4 SILICON RECTIFIER 1N5400 MOTOROLA 16 3 Q1 1 SILICON NPN TRANSISTOR 2N3771 MOTOROLA 1 4 VRl 1 ZENER DIODE, 6.8V 1N4737A MOTOROLA 1 5 Cl 1 CAPACITOR, ELECTR., 4000uF/15V TCG40 2U015N1L MALLORY 5 6 Rl 1 RESISTOR, CARBON, 12 0/ 1/2 W RC07GF221J ALLEN-BRADLEY 1 7 R2 1 RESISTOR, CARBON, 4700/ 1/4 W RC07GF472J ALLEN-BRADLEY 2 8 R3 1 RESISTOR, CARBON, 1000/ 1/4W RC07GF10 2J ALLEN-BRADLEY 11 9 N/A 1 P. C. CARD, DISPLAY PWR SUPPLY 1063-302PC TSL 1 10 SLl,SL2 SURGE LIMITER, 150 VAC S07K150 SIEMENS 6 11 VR2 1 ZENER DIODE, 8.2V/ 5W 1N5344 MOTOROLA 1 12 N/A 1 HEAT SINK 690-3-B WAKEFIELD 3 13 C2 1 CAPACITOR, TANTALUM, 10uF/35V TIM106K035POY MALLORY 16 14 C3 1 CAPACITOR, .1 uF/6 0 0V 715P10456LD3 SPRAGUE 1 15 N/A 4 #6 FLAT WASHER 14 16 N/A 4 #6 HEX NUT 633PS1 ITEM # 17 18 REF. DESIG. N/A N/A QTY. PART DESCRIPTION PART NO MANUFACTURER 4 #6 LOCK WASHER 4 6-32 PH. PAN HEAD SCREW, 3/8" QTY. PER SYSTEM 81 87C22 3 PS 2 5 VOLT DC POWER SUPPLY 1063-202 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 1 T1 1 POWER TRANSFORMER , 11V/10V ST7-10 SIGNAL 2 2 CR1-CR4 4 SILICON RECTIFIER 1N5400 MOTOROLA 16 3 Cl 1 CAPACITOR, ELECTR., 4000uF/15V TCG402U015N1L MALLORY 5 4 C2 1 CAPACITOR, TANTALUM, 10uF/15V TIM106K035POY MALLORY 16 5 VRl 1 IC, 5 VOLT REGULATOR SG323K SILICON GEN 1L 2 6 VR2 1 ZENER DIODE, 6.8V, 5W 1N5342 MOTOROLA 2 7 N/A 1 PC CARD, 5 VOLT PWR SUPPLY 1063-202PC TSL 2 8 N/A 1 HEAT SINK 690-3-B WAKEFIELD 3 9 N/A 4 SPACER, 1/2" 1457C KEYSTONE 4 10 N/A 4 6-32 PH. PAN HD. 1 1/2" SCREW 4 11 N/A 6 #6 FLAT WASHER 14 12 N/A 6 #6 LOCK WASHER 81 13 N/A 6 #6 HEX NUT 63 14 N/A 2 6-32 PH. PAN HD. 3/8" SCREW 87 5 VOLT DC POWER SUPPLY (FOR DISPLAY UNIT)C23 3A1 ITEM # REF. DESIG. 1 U1 2 U2 3 U3 4 - U4 5 U5-U7 6 N/A 7 Rl,Rl8 8 R2,R16,R23 3 RESISTOR, CARBON, 11000/ 1/4W,5% RC07GF113J ALLEN-BRADLEY 3 9 R5,R7-16, R19-22 15 RESISTOR, CARBON, 12000/ 1/4W,5% RC07GF12 3J ALLEN-BRADLEY 51 10 R4 1 RESISTOR, CARBON, 510/ 1/4W,5% RC07GF511J ALLEN-BRADLEY 1 11 R6 1 RESISTOR, CARBON, 180/ 1/4W,5% RC07GF181J ALLEN-BRADLEY 1 12 R17 1 RESISTOR, CARBON, 1000/ 1/4W,5% RC07GF102J ALLEN-BRADLEY 10 13 R24 1 RESISTOR, CARBON, 15000/ 1/4W,5% RC07GF153J ALLEN-BRADLEY 1 14 R3,R25 2 RESISTOR, CARBON, 220/ 1/4W,5% RC07GF221J ALLEN-BRADLEY 2 15 C6,C12 2 CAPACITOR, CERAMIC, .1,50V CK05BX104K AVX 12 16 C2,C3,C7 C9,C13 5 CAPACITOR, TANTALUM [, lOuF, 35V TIM106K035PQY MALLORY 14 PARTS LIST RECEIVE LOGIC P.C. ASSEMBLY QTY. PART DESCRIPTION 1 IC, MICROPROCESSOR 1 ICf DUAL MULTIVIBRATOR 1 IC, ONE-SHOT MULTIVIBRATOR 1 IC, LINE RECEIVER 3 IC, OCTAL BUFFER/INVERTER 1 PC CARD, RECEIVE LOGIC 2 RESISTOR, CARBON, 1500/ 1/4W,5% PART NO. MC68701 SN74LS629N SN74121 MC1489 SN74LS240N 1063-303PC RC07GF152J MANUFACTURER MOTOROLA TEXAS INST TEXAS INST MOTOROLA TEXAS INST TSL ALLEN-BRADLEY 1063-303 QTY. PER SYSTEM 3 1trzo PARTS LIST \ 3A1 RECEIVE LOGIC P.C. ASSEMBLY 1063-303 ITEM # REF. DESIG. QTY. PART DESCRIPTION PART NO. MANUFACTURER QTY. PER SYSTEM 17 C4-C5 2 CAPACITOR, CERAMIC, 22pFf 200V CK05BX220K AVX 2 18 C8 1 CAPACITOR, CERAMIC, .39uF, 50V CK06BX394K AVX 1 19 Cl 1 CAPACITOR, .001 uF DD-102 CENTRALAB 1 20 CIO 1 CAPACITOR, ELECTR., 33uF/16V \ 199 D336X0016DB1 SPRAGUE 2 21 Cll 1 CAPACITOR, CERAMIC, .47uF/50V CK05BX474K AVX 3 22 CR1-CR3 3 SILICON DIODE, 1 AMP, 75V 1N4001 INT'L RECTIF. 3 23 Yl 1 CRYSTAL, MICROPROC., 2.457 MHz B245 FREQ. CONTROL 2 24 Q1-Q2 2 SILICON NPN TRANSISTOR 2N2222 SIGNETICS 2 25 VR1-VR2 2 ZENER DIODE, 6.8V 1N4736 ITT 2 26 VR3 1 ZENER DIODE, 3.3V 1N746 MOTOROLA 3 27 SL1-SL2 2 SURGE LIMITER, 150 VAC S07K150 SIEMENS 4 28 T1 1 LINE TRANSFORMER TY-301P TRIAD 1 29 B1-B2 2 BATTERY, NICAD, 2.4V 41B013A-C00101 GEN. ELEC. 2 30 XI 1 SOCKET, 40-PIN DIP 24 0-AG49 D AUGAT 3 31 X2 1 SOCKET, 24-PIN DIP 224-AG49 D AUGAT 1 32 N/A 2 CARD EJECTOR S-200 SCANBE 4 RECEIVE LOGIC P.C. ASSEMBLY PAGE 2 OF 2