key: cord-0656145-1xpy0chf
authors: Chen, Lei; Wu, Lili; Wang, Yue; Pan, Yinping; Zhang, Denghui; Zeng, Junwen; Liu, Xiaoyu; Ma, Linxian; Peng, Wei; Wang, Yihua; Ren, Jie; Wang, Zhen
title: Miniaturization of the Superconducting Memory Cell via a Three-Dimensional Nb Nano-Superconducting Quantum Interference Device
date: 2020-07-23
journal: nan
DOI: nan
sha: 1a0cc8d63ecf98879cb62455730a103df500f308
doc_id: 656145
cord_uid: 1xpy0chf

Scalable memories that can match the speeds of superconducting logic circuits have long been desired to enable a superconducting computer. A superconducting loop that includes a Josephson junction can store a flux quantum state in picoseconds. However, the requirement for the loop inductance to create a bi-state hysteresis sets a limit on the minimal area occupied by a single memory cell. Here, we present a miniaturized superconducting memory cell based on a Three-Dimensional (3D) Nb nano-Superconducting QUantum Interference Device (nano-SQUID). The major cell area here fits within an 8*9 {mu}m^2 rectangle with a cross-selected function for memory implementation. The cell shows periodic tunable hysteresis between two neighbouring flux quantum states produced by bias current sweeping because of the large modulation depth of the 3D nano-SQUID (~66%). Furthermore, the measured Current-Phase Relations (CPRs) of nano-SQUIDs are shown to be skewed from a sine function, as predicted by theoretical modelling. The skewness and the critical current of 3D nano-SQUIDs are linearly correlated. It is also found that the hysteresis loop size is in a linear scaling relationship with the CPR skewness using the statistics from characterisation of 26 devices. We show that the CPR skewness range of {pi}/4~3{pi}/4 is equivalent to a large loop inductance in creating a stable bi-state hysteresis for memory implementation. Therefore, the skewed CPR of 3D nano-SQUID enables further superconducting memory cell miniaturization by overcoming the inductance limitation of the loop area.

As computers based on complementary metal-oxide-semiconductor (CMOS) technology approach the limits of their device physics, superconducting digital circuits based on Single-Flux-Quantum (SFQ) with picosecond speed and attowatt power consumption are becoming increasingly attractive. [1] [2] [3] [4] [5] [6] Their cryogenic working temperatures also make them naturally compatible with building high-frequency controlling circuits for future quantum computers. 7, 8 However, the lack of a compatible high-density, high-speed memory has been a long-standing bottleneck. 1, 9, 10 Current SFQ cache memories are mainly composed of volatile shift-register units. 11, 12 The storage element area is approximately 60×60 μm 2 . This size not only limits the memory capacity on a single chip but also its speed because signal propagation times among cells become nonnegligible in the picosecond regime.

The hybrid memories that combine CMOS memories with SFQ input/output adapter 13, 14 are the most straightforward technical solution when the integration scalability of CMOS manufacturing lines is taken into account, despite their high-power consumption and speed limitations. Recent developments in superconducting spintronics involving combination of the magnetism and the superconductivity at the junction level have mitigated the power consumption problem. [15] [16] [17] [18] [19] [20] However, the magnetic polarisation switching speed is restrained by the magnetic junction physics at cryogenic temperatures. Use of flux quantum in a superconducting loop to store data can match the speeds of SFQ circuits. 21 Several types of memory cells like Vortex Transition Memory and Quantum Flux Parametron Memory have been developed by tunnelling Josephson junctions. [22] [23] [24] Recently, these cell dimensions were reduced to 9×11 μm 2 by using a state-of-the-art Nb-based-junction process developed at the MIT Lincoln Laboratory. 10 Unfortunately, further cell area reduction will be extremely challenging because of the requirement for few-pH inductors. Therefore, the problem is being tackled via other non-traditional methods including superconducting nanowires 25, 26 or planar nano-superconducting quantum interference devices (nano-SQUIDs) 27 with large kinetic inductance that can replace geometric inductances. However, these devices with a linear current-phase relation (CPR) did not show a stable bi-state hysteresis similar to that of ferromagnets for the storage of binary data.

Nano-SQUIDs of Dayem-type nanobridge junctions (NBJs) have been developed to study the nanoscale magnetism for many years. [28] [29] [30] [31] [32] [33] [34] The 3D Nb nano-SQUID that we developed recently has demonstrated a decent Josephson effect and a relatively large kinetic inductance. 35, 36 According to theoretical models, the CPR of the NBJ is skewed from that of the ideal Josephson effect. [37] [38] [39] [40] The shape of CPR plays an important role in the storage hysteresis between flux quantum states. Recently, the CPRs of several non-traditional Josephson junctions have been studied to reveal their intrinsic physical properties. [41] [42] [43] However, the exact CPRs of NBJs have not yet been fully studied experimentally. 44 Here, we developed a superconducting memory cell using a 3D nano-SQUID. We demonstrated a hysteresis loop in flux quantum states by sweeping the biasing current to the storage loop. The hysteresis loop size can be further tuned by flux tuning of the nano-SQUID for cross-selected memory cell implementation. Additionally, the CPR of the nano-SQUID and the single NBJs in the storage loop was obtained from the bias current as a function of the total magnetic flux. The measured CPRs show good consistency with the theoretical model and are skewed from a sine function. Furthermore, we found that the CPR skewness of 3D nano-SQUIDs plays an equivalent role to the loop inductance in forming a stable memory hysteresis loop. We concluded that a memory cell based on a 3D nano-SQUID with a skewed CPR can lift the inductance constraints and thus is very promising for scalable superconducting memory. The storage loop is inductively coupled to the readout micro-SQUID so that the reading and writing operations are independent from each other and the data can be read out non-destructively. The micro-SQUID used here is also made from 3D nanobridge junctions. The readout micro-SQUID is locked at an operating point by selecting a bias current Irx and a flux feedback current Iry. When the flux quantum state ФT in the storage loop jumps, a voltage change across the SQUID will be sensed as a data readout. Both the storage loop and readout micro-SQUIDs can be cross-selected in an XY manner for memory implementation of both the data and the address. A false-coloured SEM image of the complete memory cell is shown in Figure 1 (b). The blue and yellow structures are made from 150-nm-thick Nb films and are electrically separated by a 12-nm-wide SiO2 slit. Then, a 10-nm-thick and 50-nm-wide Nb nanowire are set across the insulated slit to form a 3D NBJ. The insets on the right show magnified scanning electron microscope (SEM) images of a nano-SQUID and a single NBJ.

To write a binary datum, the storage loop should switch steadily between two flux quantum states in a manner similar to ferromagnetic hysteresis. In Figure 2 For the cross-selected memory cell implementation, the hysteresis loop size should also be independently tunable. In Figure 3 (a), we show the storage loop hysteresis measured at various magnetic flux bias values applied to the nano-SQUID by an external coil with current Iwx. As Iwx increased from 0 to 300 mA, the size of the hysteresis ∆Iwy decreased continuously. The centre of the hysteresis loop was shifted to the same Iwy level by the amount Iwy-center-shift for a better comparison and Iwy-center-shift was then plotted as a function of Iwx in Figure 3 (b). The linear fitting of Iwy-center-shift in Figure 3 (b) indicates that the magnetic flux that is coupled to the storage loop acts as a flux bias with a mutual inductance of 0.34 pH.

In Figure 3 (c), we plotted ∆Iwy as a function of Iwx on the left axis (blue) and as a function of the flux modulation of a nano-SQUID on the right axis (red). The tuning of ∆Iwy follows the flux modulation profile of the nano-SQUID. The nano-SQUID has the same dimensions as the nano-SQUID in the storage loop and was measured independently using the same external coil Iwx. The modulation depth of the 3D nano-SQUID is ~66% and is defined as the percentage of the modulated amplitude with the maximal value of the critical current. The remaining 34% of the unmodulated critical current is usually explained using the skewed CPR model. No change in the size of the hysteresis loop was observed for the storage loop with the single NBJ. This indicates that the magnetic flux that is coupled to the storage loop will not affect its hysteresis. Therefore, the tuning of the hysteresis loop size is caused by the flux modulation of the nano-SQUID alone. The action of the nano-SQUID as a flux-tunable junction thus enables selection of the required memory cell. A nano-SQUID with nanobridge junctions usually has a smaller magnetic flux modulation when compared with that of a traditional SQUID made from tunnelling junctions. A theoretical model based on the Ginzburg-Landau equation predicts that the CPR of a NBJ deviates from the sine function based on the ratio between its effective length leff 37 and the superconducting coherence length ξ. 38, 39, 45 Here, we define the skewness ∆θ as the phase difference of the maximum CPR value from π/2, which is the maximum value of a sine function. In Figure 4 (a), we plotted ∆θ as a function of leff/ξ. The inset plot shows the calculated CPRs for leff/ξ =1 and leff/ξ = 6. When leff/ξ=1, the CPR is an approximate sine wave and ∆θ = 0; ∆θ then starts to increase as leff/ξ increases. The measured CPRs shown in Figure 2 (c) and (d) and Figure 5 (b) confirm their consistency with the predictions of the theoretical model and give information on ∆θ for each device. We then characterised 17 devices with single NBJs and nine devices with nano-SQUIDs in their storage loops. The 3D NBJs that we developed have improved ∆θ considerably when compared with the use of planar nanobridge junctions. However, the CPR skewness ∆θ of these junctions still spreads from π/4 to π, where the uncertainty comes mainly from the nonuniform junction thickness caused by the lift-off step during the fabrication process. The thickness affects the final leff value of the junction. In Figure 4 Because the nano-SQUID I0 is double that of the single NBJ, its fitting line is slightly above that for the single NBJ device. Therefore, ∆θ is equivalent mathematically to the storage loop inductance LT in creating a stable memory hysteresis. Tuning of ∆θ to ~π/2 will mean that it is no longer necessary to have a minimal LT requirement. It is also important that ∆Iwy/Iwy-period < 1 with ∆θ < π because overlapping of the hysteresis with the next flux quantum states must be avoided to permit definitive state writing. In addition, high skewness in the CPR will also lower the flux modulation depth of the nano-SQUID and lead to an untunable hysteresis size. Therefore, a ∆θ range from π/4 to 3π/4 with a ∆Iwy/Iwy-period ranging from 0 to 0.6 is suitable for an experimentally tunable memory hysteresis. The jump height in the change in the flux quantum states can be estimated using ∆ФT = 2IoLT/(1+∆Iw/Iw-period). This parameter is a rational function of ∆θ and will become saturated at IoLT. Within the scope of the plot, it can be approximated using a line and provides a guide for the eye to indicate the increasing trend. The slopes here are 20.1 mФ0/rad and 41.8 mФ0/rad for the devices with the single junctions and the nano-SQUIDs, respectively.

These results indicate that a change in ∆θ from π/4 to 3π/4 will only increase ∆ФT by 31.6 mФ0 and 65.7 mФ0 for the two devices, respectively, and will not affect the micro-SQUID readout greatly. Therefore, ∆θ can play the same role as the storage loop inductance LT in creating a stable memory hysteresis. The change in ∆θ of the 3D nano-SQUID from π/4 to 3π/4 increases the value of ∆Iwy/Iwy-period from 0 to 0.6, which is good for memory implementation. The jump height of ∆Ф=206.4±32.9 mФ0 at ∆θ=π/2±π/4 is much larger than the regular resolution of a micro-SQUID, which is less than 1 mФ0. nano-SQUID also represent a major advantage in the miniaturization procedure. The junction thickness determines both the critical current and the CPR skewness simultaneously. Therefore, use of this approach to fabricate a scalable superconducting memory will be very promising when the 3D nanobridge junctions can be produced with a uniform thickness. Furthermore, future memory development must be resorted to electronic computer-aided designing (EDA) tools. It would be essential to build a supplemental module to the existing superconducting EDA software that can describe a junction with a skewed CPR.

In conclusion, we have demonstrated a miniaturized superconducting memory cell with dimensions of 8×9 μm 2 using a 3D nano-SQUID. We observed stable periodic hysteresis between the neighbouring flux quantum states produced by sweeping the bias current to the storage loop. The hysteresis loop size can be tuned further by flux tuning of the critical current of the nano-SQUID for cross-selected memory cell implementation. The CPR can be obtained by measuring the bias current as a function of the total magnetic flux in the storage loop. The measured CPRs of the nano-SQUID and the NBJ are both skewed from that of an ideal Josephson junction and show good agreement with the predictions of theoretical models. Both the critical current and the CPR skewness are linearly correlated and are determined by the nanobridge junction thicknesses. Furthermore, the normalised hysteresis size scales linearly with the CPR skewness, which agrees well with our theoretical prediction. Therefore, the CPR skewness plays a role equivalent to that of the inductance in forming a stable memory hysteresis. An appropriate skewness range from π/4 to 3π/4 can mitigate the minimal loop inductance requirement. Further miniaturization of our proposed memory cell towards dimensions of ~1×1 μm 2 should be technically straightforward. The skewed CPR allows the memory cell to overcome the size limitation due to the inductance and therefore will be an important building block for scalable superconducting memory fabrication.

Device fabrication was performed using the 3D-NBJ fabrication process. 35 First, a Nb film layer with a thickness of 150 nm, which is coloured blue in Figure 1(b) , was deposited via direct current magnetron sputtering on a 4-in silicon wafer. After photolithography and reactive-ion etching processes, the photo-resist was left on here. A 25-nm-thick SiO2 layer was deposited to produce a ~12-nm-thick SiO2 layer on the sidewall of the first Nb layer. Then, a second Nb film with a thickness of 150 nm, which is coloured yellow in Figure 2(b) , was deposited. Using a lift-off process, a 12-nm-wide SiO2 insulator slit was then formed between the two Nb banks. Finally, Nb nanobridges that were ~10-nm-thick and 50-nmwide were patterned across the insulating gap by electron-beam lithography. Here, we used a 10-nm-thick and 800-nm-wide Nb patch to form a closed storage loop. Devices with both a single NBJ and a 3D nano-SQUID were designed and fabricated from the same 4-in wafer batch. All devices were tested in liquid helium at 4.2 K.

The bias current Iwx, Iwy, Irx, and Iry as shown in Figure 1 (a) are supplied by four independent DC current sources. Iwx generates a magnetic flux to the nano-SQUID through an external coil, and Iwy is connected to the storage loop directly. During the sweeping of Iwy, the voltage of the readout SQUID is monitored by a voltage meter and locked to a fixed value by applying feedback current through Irx.

Therefore, the change in the magnetic flux of the storage loop is given by the change of Irx. The mutual inductance between the storage loop and the readout SQUID loop is 1.62 pH.

As shown in Figure 5(a) , the current Iw that is injected into the storage loop with a junction will be split into the current Ij, which is directed to the junction, and (Iw-Ij), which is directed to the right part of To estimate the hysteresis loop size ∆Iw/Iw-period, ∆Iw is approximated to be the difference in the Iw values corresponding to the maximal (θ=π, ФT=0.25Ф0) and minimal (θ=3π/2, ФT=0.75Ф0) values of the sine function. We then obtain the relation ∆Iw/Iw-period = 2I0LT/Ф0 − 0.5. Therefore, to observe a stable hysteresis, the condition that I0LT ≥ 0.25Ф0 must be fulfilled for ∆Iw/Iw-period ≥0. In the skewed CPR case, the phases of the maximal and minimal values in the CPR deviate by ∆θ. Then, ∆Iw/Iw-period =2I0LT/Ф0+(∆θ/π) − 0.5 is obtained. The jump height between two flux quantum states can then be estimated geometrically by drawing a parallelogram with known height. Therefore, we obtain the relation ∆ФT = 2IoLT/(1+∆Iw/Iwperiod), as shown in Figure 5 (c). 

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authors also appreciate all the Shanghai medical personnel that provide us a safe community from COVID-19 to write this paper.

Lei Chen and Zhen Wang planned the research and wrote the paper. Lili Wu and Lei Chen performed 

Competing Interests: The authors declare no competing interests.