id	author	title	date	pages	extension	mime	words	sentences	flesch	summary	cache	txt
work_zukr6fkh3zbxdcgipfzstjjrqu	Ali Abbass Zoraghchian	A Fault Detection Method for Combinational Circuits	2016	5	.pdf	application/pdf	3343	255	61	proposes and evaluates a logic level fault-tolerant method based on parity for designing combinational circuits. Keywords: Soft Error, Transient Fault, Fault-Tolerance, Combinational Circuits, Full Adder. implement for logic blocks [8,9].However, combinational circuits are very importance for fault-tolerant design. fault sensitivity in combinational and sequential circuits ;in section 3 we proposed a new faulttolerance technique in elements, and combinational logic are the most sensitive parts and could be affected by soft errors and transient faults. These masking effects have been found to result in a significantly lower rate of soft errors in combinational logic errors in combinational logic circuits and suggest a logic level fault-tolerant design method. In this paper we presented a new approach to design fault-tolerant combinational circuits. TMR method is a conventional technique to design fault-tolerant circuits. In this paper, we proposed a new approach to design fault-tolerant combinational circuits. the soft error rate of combinational logic," presented at the DSN.	./cache/work_zukr6fkh3zbxdcgipfzstjjrqu.pdf	./txt/work_zukr6fkh3zbxdcgipfzstjjrqu.txt