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en-wikipedia-org-2947		RISC-V - Wikipedia			.html	text/html	12038	1326	67	A number of companies are offering or have announced RISC-V hardware, open source operating systems with RISC-V support are available and the instruction set is supported in several popular software toolchains. The variable-length ISA enables extensions for both student exercises and research.[1] The separated privileged instruction set permits research in operating system support, without redesigning compilers.[15] RISC-V's open intellectual property allows its designs to be published, reused, and modified.[1] Many RISC-V computers might implement the compact extension to reduce power consumption, code size, and memory use.[1] There are also future plans to support hypervisors and virtualization.[15] The instruction set base is specified first, coding for RISC-V, the register bit-width, and the variant; e.g., RV64I or RV32E. Packed-SIMD instructions are widely used by commercial CPUs to inexpensively accelerate multimedia and other digital signal processing.[1] For simple, cost-reduced RISC-V systems, the base ISA's specification proposed to use the floating-point registers' bits to perform parallel single instruction, multiple data (SIMD) sub-word arithmetic.	./cache/en-wikipedia-org-2947.html	./txt/en-wikipedia-org-2947.txt